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Past Questions
When there is no voltage across gate terminal the channel show maximum conductance, this type of FET is called —
A)
Depletion mode
B)
Enhancement mode
C)
Amplification mode
D)
Feedback mode
In Field Effect Transistors (FETs), there are two primary modes of operation based on how the conducting channel is formed:
1. **Depletion Mode:** In this mode, a physical conducting channel exists between the source and drain even when the gate-to-source voltage (Vgs) is zero. Therefore, when there is no voltage across the gate terminal, the channel is 'open' and shows maximum conductance (it is 'normally ON'). To reduce the conductance or turn the device off, a voltage must be applied to 'deplete' the channel of charge carriers.
2. **Enhancement Mode:** In this mode, no conducting channel exists when Vgs is zero. The device is 'normally OFF'. A specific threshold voltage must be applied to the gate to 'enhance' or create a channel to allow current to flow.
3. **Amplification and Feedback modes:** These are not types of FET construction/modes of operation, but rather functions or configurations in which a transistor can be used in a circuit.
Since the question specifies that the channel shows maximum conductance when there is no voltage across the gate, it describes a 'normally ON' device, which is the characteristic of a Depletion mode FET.
The most widely used universal gates are —
A)
OR and AND gates
B)
NOR and NAND gates
C)
NOR and AND gates
D)
NAND and OR gates
In digital electronics, a 'Universal Gate' is a gate that can be used to implement any other Boolean function (AND, OR, NOT, XOR, XNOR) without the need for any other gate type.
1. NAND Gate: By connecting the inputs of a NAND gate together, it acts as a NOT gate. By combining NAND gates, one can create AND and OR logic.
2. NOR Gate: Similarly, by connecting the inputs of a NOR gate together, it acts as a NOT gate. Combining NOR gates allows for the creation of AND and OR logic.
Comparing the options:
- Option (a): OR and AND are basic gates, not universal, as they cannot implement a NOT function on their own.
- Option (b): NOR and NAND are the two recognized universal gates in digital logic.
- Option (c) and (d): These contain a mix of basic and universal gates, but since both AND and OR are not universal, these options are incorrect.
Which pin of the external hardware is said to exhibit INT0 interrupt?
A)
pin no 10
B)
pin no 11
C)
pin no 12
D)
pin no 13
In the context of the most common microcontroller used in technical examinations (the Intel 8051 architecture), the external interrupts are mapped to specific physical pins. The 8051 microcontroller has two external interrupt pins: INT0 and INT1.
1. INT0 (External Interrupt 0) is mapped to physical pin number 12 (P3.2).
2. INT1 (External Interrupt 1) is mapped to physical pin number 13 (P3.3).
Therefore, the pin that exhibits the INT0 interrupt is pin no 12.
- Option a (pin 10) corresponds to P3.0 (RXD).
- Option b (pin 11) corresponds to P3.1 (TXD).
- Option d (pin 13) corresponds to INT1.
How many registers can be utilized to write the programs by an effective selection of register bank in program status word (PSW)?
A)
8
B)
16
C)
32
D)
64
This question refers to the architecture of the 8051 microcontroller. In the 8051, there are 32 general-purpose registers organized into 4 register banks (Bank 0, Bank 1, Bank 2, and Bank 3). Each bank contains 8 registers (R0 to R7), totaling 32 registers (4 banks × 8 registers = 32). The selection of the active register bank is controlled by two bits (RS0 and RS1) located in the Program Status Word (PSW) register. By changing the values of RS0 and RS1 in the PSW, the programmer can effectively switch between these 4 banks to utilize a total of 32 different registers for data storage and manipulation during program execution.
The full form of VLSI is—
A)
Very light system information
B)
Very large system information
C)
Very long story information
D)
Very large scale integration
VLSI stands for Very Large Scale Integration. It is the process of creating an integrated circuit (IC) by combining millions or billions of MOS (Metal-Oxide-Semiconductor) transistors onto a single chip. This technology allows for the creation of complex systems like microprocessors and memory chips.
Analysis of options:
- Option (a) 'Very light system information' is incorrect as it has no technical meaning in electronics.
- Option (b) 'Very large system information' is incorrect; while 'large' is used, 'system information' does not describe the fabrication process of ICs.
- Option (c) 'Very long story information' is completely irrelevant to the field of electronics.
- Option (d) 'Very large scale integration' is the correct technical term used in semiconductor engineering.
In bridge rectifier we use —
A)
1 diode
B)
2 diode
C)
3 diode
D)
4 diode
A bridge rectifier is a circuit used to convert alternating current (AC) to direct current (DC). It consists of four diodes arranged in a bridge configuration (a closed-loop diamond shape). During the positive half-cycle of the AC input, two diagonally opposite diodes conduct, allowing current to flow through the load. During the negative half-cycle, the other two diodes conduct, ensuring that the current flows through the load in the same direction as before. This results in full-wave rectification without the need for a center-tapped transformer.
Comparison with other options:
- 1 diode: Used in a Half-Wave Rectifier.
- 2 diodes: Used in a Full-Wave Center-Tapped Rectifier.
- 3 diodes: Not a standard configuration for basic bridge or full-wave rectification.
What is the uses of capacitor in rectifier?
A)
To block AC current
B)
To minimize ripple content
C)
To increase voltage output
D)
To block DC current
In a rectifier circuit, the output of the diodes is pulsating DC, which contains both a DC component and an AC component (known as ripple). A capacitor is connected in parallel with the load as a 'filter capacitor'. When the rectifier output voltage rises, the capacitor charges; when the output voltage drops, the capacitor discharges into the load, maintaining the voltage level. This process 'smooths' the waveform, thereby reducing the ripple factor and providing a steadier DC voltage.
Analysis of other options:
- Option (a): Capacitors block DC, not AC.
- Option (c): While a filter capacitor can increase the average DC voltage (bringing it closer to the peak voltage), its primary functional 'use' or purpose in a rectifier is filtering/smoothing (minimizing ripple).
- Option (d): While capacitors do block DC, this is a property of the component, not the intended 'use' or purpose of adding a capacitor to a rectifier circuit.
The process of conversion of AC to DC is called —
A)
Amplification
B)
Modulation
C)
Rectification
D)
Confirmation
Step-by-step reasoning:
1. Analysis of the requirement: The question asks for the term used to describe the conversion of Alternating Current (AC), which periodically reverses direction, into Direct Current (DC), which flows in one constant direction.
2. Evaluating Option (c) Rectification: Rectification is the electrical process of converting AC to DC. This is typically achieved using diodes (in uncontrolled rectifiers) or thyristors/SCRs (in controlled rectifiers) which allow current to flow in only one direction.
3. Evaluating Option (a) Amplification: Amplification is the process of increasing the amplitude of a signal (voltage or current) without changing its frequency or nature. It does not convert AC to DC.
4. Evaluating Option (b) Modulation: Modulation is the process of varying one or more properties of a periodic waveform (carrier signal) with a modulating signal that typically contains information to be transmitted. It is a communication process, not a power conversion process.
5. Evaluating Option (d) Confirmation: This is not a standard technical term in power electronics related to current conversion.
Conclusion: Rectification is the correct technical term for AC to DC conversion.
In SCR, If the anode is made positive with respect to cathode and gate terminal keep open, this mode of operation is called —
A)
Forward blocking mode
B)
Forward conduction mode
C)
Reverse blocking mode
D)
Reverse conduction mode
A Silicon Controlled Rectifier (SCR) is a four-layer (PNPN) device that operates in three primary modes based on the biasing of its terminals:
1. **Forward Blocking Mode**: This occurs when the anode is positive with respect to the cathode (forward biased), but the gate terminal is either open or receiving no signal. In this state, the junction between the P and N layers (the central junction J2) is reverse biased, preventing current flow from anode to cathode. The device 'blocks' the current despite being forward biased, hence the term 'Forward Blocking Mode'.
2. **Forward Conduction Mode**: This occurs when the SCR is forward biased and either a positive pulse is applied to the gate or the anode voltage exceeds the forward breakover voltage (VBO). The device then conducts current.
3. **Reverse Blocking Mode**: This occurs when the cathode is made positive with respect to the anode. The outer junctions are reverse biased, and the device blocks current flow in the reverse direction.
4. **Reverse Conduction Mode**: This is generally not a standard operating mode for an SCR as it would lead to device failure (breakdown) if the reverse breakdown voltage is exceeded.
Since the question specifies the anode is positive (forward bias) and the gate is open (no trigger), the device remains in the blocking state.
Which Addition is correct?
A)
0101 +1111 =11010
B)
0101 +1111 = 10100
C)
0101+ 1111 = 11001
D)
0101+ 1111 = 11110
To solve this binary addition, we follow the standard rules of binary arithmetic:
1. 0 + 0 = 0
2. 0 + 1 = 1
3. 1 + 0 = 1
4. 1 + 1 = 0 (carry 1)
5. 1 + 1 + 1 = 1 (carry 1)
Step-by-step calculation for 0101 + 1111:
- Column 1 (Rightmost/LSB): 1 + 1 = 0, carry 1
- Column 2: 0 + 1 + 1 (carry) = 0, carry 1
- Column 3: 1 + 1 + 1 (carry) = 1, carry 1
- Column 4: 0 + 1 + 1 (carry) = 0, carry 1
- Column 5 (Final carry): 1
Result: 10100
Verification via Decimal conversion:
0101 (binary) = 5 (decimal)
1111 (binary) = 15 (decimal)
5 + 15 = 20 (decimal)
20 in binary is 10100 (16 + 0 + 4 + 0 + 0).
Comparing with options:
- Option a: 11010 (26 in decimal) - Incorrect
- Option b: 10100 (20 in decimal) - Correct
- Option c: 11001 (25 in decimal) - Incorrect
- Option d: 11110 (30 in decimal) - Incorrect
... are electronic devices that generate various type of electrical waveform sine wave, square wave, triangle wave etc.
A)
Function generator
B)
Multimeter generator
C)
Current generator
D)
Obm meter
A function generator is a piece of electronic test equipment used to generate different types of electrical waveforms over a wide range of frequencies. The most common waveforms produced are sine waves, square waves, and triangle waves. These are essential for testing, debugging, and simulating signals in electronic circuits.
Analysis of other options:
- b. Multimeter generator: This is a non-existent term. A multimeter is a measurement device (voltmeter, ammeter, ohmmeter), not a signal generator.
- c. Current generator: While current sources exist, they are designed to provide a constant current regardless of load, not to generate specific periodic waveforms like sine or triangle waves.
- d. Obm meter: This is not a standard term in electrical instrumentation for waveform generation.
What is the approximate voltage drop across a silicon diode when it is in forward bias?
A)
0.2V
B)
0.3.V
C)
0.7V
D)
1.5V
A diode is a semiconductor device that allows current to flow in one direction. For a diode to conduct in forward bias, the applied voltage must overcome the internal potential barrier (built-in potential) of the P-N junction.
1. **Silicon (Si) Diodes**: The barrier potential for silicon is approximately 0.7V. Therefore, the voltage drop across a silicon diode when it is conducting in forward bias is typically cited as 0.7V.
2. **Germanium (Ge) Diodes**: The barrier potential for germanium is lower, typically around 0.3V.
Evaluating the options:
- Option (a) 0.2V: Incorrect; too low for standard silicon or germanium diodes.
- Option (b) 0.3V: Incorrect; this is the characteristic voltage drop for a Germanium diode.
- Option (c) 0.7V: Correct; this is the standard approximate voltage drop for a Silicon diode.
- Option (d) 1.5V: Incorrect; this is significantly higher than the knee voltage of a standard silicon diode (though some Zener diodes or LEDs have higher forward voltages, a standard silicon diode is 0.7V).
The potential barrier across PN junction correspond to—
A)
Height of barrier
B)
Width of barrier
C)
Forward bias of the junction
D)
Reverse bias of the junction
In a PN junction, the potential barrier (also known as the built-in potential) is the electric potential difference that develops across the depletion region due to the diffusion of charge carriers. This potential creates an energy barrier that prevents further diffusion of majority carriers across the junction. In energy band diagrams, this potential difference is represented as the 'height' of the barrier that electrons must overcome to move from the n-type region to the p-type region.
- Option (a) is correct because the potential barrier directly determines the energy height that carriers must cross.
- Option (b) is incorrect because the 'width' refers to the physical thickness of the depletion region, which is influenced by the potential but is a spatial dimension, not the potential itself.
- Option (c) and (d) are incorrect because forward and reverse bias are external voltages applied to the junction to either lower or increase the existing potential barrier; they are not what the potential barrier 'corresponds to' inherently.
What is the size of the program counter in the 8051 microcontroller?
A)
8 bits
B)
10 bits
C)
11 bits
D)
16 bits
The Program Counter (PC) in the 8051 microcontroller is a register that holds the address of the next instruction to be executed. In the 8051 architecture, the program memory (ROM) can be addressed up to 64 KB (2^16 bytes). To address 64 KB of memory, a 16-bit address bus is required. Therefore, the Program Counter must be 16 bits wide to store and increment these addresses.
Analysis of other options:
- 8 bits: This is the size of the Accumulator, B register, and most Special Function Registers (SFRs), but it would only allow for 256 bytes of program memory.
- 10 bits: Not a standard register size for the 8051 architecture.
- 11 bits: Not a standard register size for the 8051 architecture.
In RC phase shift oscillator, one R-C bridge provides phase shift.
A)
30°
B)
60°
C)
90°
D)
180°
An RC phase shift oscillator is based on the Barkhausen criterion for oscillation, which requires a total loop phase shift of 0° or 360°. In a typical RC phase shift oscillator using an inverting amplifier (like a Common Emitter BJT or an inverting Op-Amp), the amplifier itself provides a phase shift of 180°. To satisfy the oscillation condition, the feedback network must provide an additional 180° phase shift. This feedback network consists of three identical RC (Resistor-Capacitor) sections connected in cascade. Since the total required shift from the RC network is 180° and there are three identical sections, each individual RC section (or 'bridge' as termed in the question) must provide a phase shift of 180° / 3 = 60°. Therefore, one RC section provides a 60° phase shift.
The common-emitter transistor circuit has —
A)
High gain
B)
Low gain
C)
Negligible gain
D)
Zero gain
The common-emitter (CE) transistor configuration is known for providing high current gain and high overall power gain, which is why it is widely used as an amplifier stage. In CE, the input is applied to the base-emitter junction and the output is taken from the collector-emitter circuit, giving substantial amplification.
Why the others are incorrect:
- b) Low gain: Incorrect, because CE is not a low-gain configuration; it is one of the highest-gain transistor configurations.
- c) Negligible gain: Incorrect, since CE provides significant amplification, not a negligible one.
- d) Zero gain: Incorrect, because the circuit definitely amplifies signals and does not have zero gain.
When the microcontroller executes some arithmetic operations, then the flag bits of which register are affected?
A)
PSW
B)
SP
C)
DPTR
D)
PC
The correct answer is **PSW** (Program Status Word). In a microcontroller such as the 8051, arithmetic and logical operations update the status/flag bits like Carry, Auxiliary Carry, Overflow, and Parity, which are contained in the PSW register. Therefore, when arithmetic operations are executed, the affected flag bits are in PSW.
Why the others are incorrect:
- **PC (Program Counter)**: stores the address of the next instruction; it does not hold arithmetic status flags.
- **DPTR (Data Pointer)**: used for addressing external/data memory; it is not a flag register.
- **SP (Stack Pointer)**: points to the top of the stack; it also does not contain arithmetic flag bits.
Which of the ports act as the 16 bit address lines for transferring data through it?
A)
PORT 0 and PORT 1
B)
PORT 1 and PORT 2
C)
PORT 0 and PORT 2
D)
PORT 1 and PORT 3
In the 8051 microcontroller, Port 0 and Port 2 are used together as the 16-bit external address bus when accessing external memory. Port 0 carries the lower 8 address bits (A0–A7) multiplexed with data, and Port 2 carries the higher 8 address bits (A8–A15). Hence, the correct option is PORT 0 and PORT 2.
Why the others are incorrect:
- PORT 0 and PORT 1: Port 1 is a general-purpose I/O port and is not used for the external 16-bit address bus.
- PORT 1 and PORT 2: Port 1 does not participate in external address/data multiplexing.
- PORT 1 and PORT 3: Port 3 is used for alternate control functions (like RD, WR, INT, T0/T1, etc.), not as the 16-bit address lines.
In a full adder, there are —
A)
Two binary number inputs and two outputs
B)
Three binary digit inputs and two binary outputs
C)
Three binary digit inputs and three binary digit outputs
D)
Two binary digit input and three binary outputs
A full adder adds three 1-bit binary inputs: two significant bits (A and B) and a carry-in (Cin). It produces two outputs: a Sum bit and a Carry-out bit. Therefore, the correct description is "three binary digit inputs and two binary outputs." Option c is incorrect because a full adder does not have three outputs. Option d is incorrect because it says only two inputs, but a full adder has three inputs. Option a is incorrect because it refers to two binary number inputs and two outputs, which is not the standard full adder configuration.
How many control lines are present in analog to digital converter in addition to reference voltage?
A)
Three
B)
Two
C)
One
D)
None
An analog-to-digital converter (ADC) typically requires one control line in addition to the reference voltage: the start/enable or control input used to initiate conversion. Hence, the correct option is 'One'. The other options are incorrect because standard ADC operation does not require two or three separate control lines beyond the reference voltage, and 'None' is wrong since at least one control line is needed for conversion control.
What is the meaning of the instruction MOV A,05H?
A)
data 05H is stored in the accumulator
B)
fifth bit of accumulator is set to one
C)
address 05H is stored in the accumulator
D)
data 05H is rotated
In the context of 8051 microcontroller assembly language, the instruction 'MOV A, 05H' is a data transfer instruction.
1. 'MOV' is the mnemonic for Move, which actually performs a copy operation.
2. 'A' refers to the Accumulator register (the destination).
3. '05H' refers to the source. In 8051 assembly, when a numeric value is provided in this format without a '#' prefix, it refers to the direct address of a memory location in the Internal RAM. However, in the context of standard multiple-choice questions for JE exams, 'MOV A, 05H' is typically interpreted as moving the content of memory location 05H (which is data) into the accumulator.
Evaluating the options:
- Option (a) is correct because it describes the movement of data (from address 05H) into the accumulator.
- Option (b) is incorrect because setting a specific bit would require a 'SETB' instruction (e.g., SETB ACC.5).
- Option (c) is technically a common point of confusion, but the instruction does not store the 'number' 05H as an address; it stores the 'value' found at that address.
- Option (d) is incorrect because rotation requires 'RL' or 'RR' instructions.
Which of the following amplifier has the highest efficiency —
A)
ClassA
B)
ClassB
C)
Class C
D)
Class D
Efficiency in power amplifiers refers to the ratio of the AC output power delivered to the load to the DC power drawn from the supply.
1. **Class A**: The transistor conducts for the full 360° of the input cycle. It has the lowest efficiency (maximum theoretical efficiency is 25% for resistive load and 50% for transformer-coupled load) because the transistor draws current even when there is no input signal.
2. **Class B**: The transistor conducts for only 180° of the cycle. It is more efficient than Class A, with a maximum theoretical efficiency of approximately 78.5%.
3. **Class C**: The transistor conducts for less than 180° of the cycle. It is highly efficient (often exceeding 80%) and is used primarily in RF applications, but it introduces significant distortion.
4. **Class D**: This is a switching amplifier. Instead of operating in the linear region, the transistors act as switches (either fully ON or fully OFF). Since the voltage drop across the transistor is nearly zero when ON and the current is zero when OFF, power dissipation in the output stage is minimal. Theoretical efficiency for Class D amplifiers can reach nearly 100% (practically 90-95%).
Comparing the four, Class D has the highest efficiency due to its switching nature.
In the Op-amp configuration the voltage which add or subtract the input voltages are called —
A)
Differential amplifier
B)
Cascade amplifier
C)
Summing amplifier
D)
Coupled amplifier
Step-by-step reasoning: 1. The question asks for the Op-amp configuration that performs the mathematical operation of adding or subtracting input voltages. 2. A Summing Amplifier (also known as a Voltage Adder) is a specific Op-amp circuit configuration where multiple input voltages are applied to the summing junction (usually the inverting input). The output voltage is proportional to the algebraic sum of the input voltages. 3. If the inputs are applied to the inverting terminal, it acts as a subtracting summer; if a combination of inverting and non-inverting inputs are used, it can perform addition and subtraction. 4. Evaluating other options: (a) Differential amplifier: Specifically amplifies the difference between two inputs, but the general term for adding/subtracting multiple signals is a summing amplifier. (b) Cascade amplifier: Refers to connecting amplifiers in series to increase overall gain. (d) Coupled amplifier: Refers to the method of connecting stages (e.g., RC coupling, Direct coupling) to transfer signals.
Which of the following signals are generated by Wien-bridge oscillators?
A)
Square wave
B)
Sine wave
C)
Triangular wave
D)
Pulse wave
A Wien-bridge oscillator is a type of electronic oscillator that generates a high-quality sinusoidal (sine wave) output. It consists of a non-inverting amplifier and a lead-lag network (the Wien-bridge circuit) providing positive feedback. The bridge network is designed to have a phase shift of 0 degrees at a specific frequency, and the amplifier provides the necessary gain to maintain oscillations.
Why other options are incorrect:
- Square waves (a) and Pulse waves (d) are typically generated by relaxation oscillators or multivibrators using switching elements.
- Triangular waves (c) are typically generated by integrating a square wave using an integrator circuit.
Programmable logic array (PLA ) uses —
A)
ROM Matrices
B)
PROM Matrices
C)
RAM Matrices
D)
Silo Memory
A Programmable Logic Array (PLA) is a type of programmable logic device used to implement combinational logic. It consists of two programmable planes: a programmable AND array followed by a programmable OR array.
1. **Understanding the Structure**: In a PLA, both the AND gate inputs and the OR gate inputs are programmable. This flexibility allows the designer to choose which product terms are generated and which product terms are summed to create the output.
2. **Comparison with PROM**: A Programmable Read-Only Memory (PROM) consists of a fixed AND array (which acts as a decoder to generate all possible minterms) and a programmable OR array.
3. **Why 'PROM Matrices' is the intended answer**: In the context of digital electronics textbooks and competitive exams, the architecture of a PLA is often described as utilizing the concepts of PROM matrices but enhancing them. While a PROM has a fixed AND and programmable OR, a PLA makes both programmable. However, among the given options, 'PROM Matrices' refers to the underlying technology of programmable fuse/interconnect matrices used in these devices.
4. **Analysis of other options**:
- **ROM Matrices**: ROM has both AND and OR arrays fixed (hardwired).
- **RAM Matrices**: RAM is volatile memory used for data storage, not for implementing fixed logic functions via programmable arrays.
- **Silo Memory**: This is not a standard term in digital logic design for programmable arrays.