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Past Questions

Junior Engineer • Paper-I

Porting the software to work in a new environment refers to

A) Adaptive maintenance
B) Corrective maintenance
C) Testing
D) All of these
Porting software to work in a new environment is called adaptive maintenance. It involves modifying the software so it can run on a different operating system, hardware platform, compiler, or other external environment. Corrective maintenance is for fixing defects, and testing is a verification activity, not a maintenance type. Therefore, the correct option is (a) Adaptive maintenance.
Junior Engineer • Paper-I

Which of the following is the process of determining whether the output of one phase of software development conforms to that of its previous phase?

A) Validation
B) Verification
C) Identification
D) None of these
Verification is the process of checking whether the output of one phase of software development conforms to the specifications or deliverables of the previous phase. It answers the question: 'Are we building the product right?' Validation, by contrast, checks whether the final product meets user needs and intended use, not phase-to-phase conformity. Identification is unrelated to software development phase checking, and 'None of these' is incorrect because verification is the standard term for this process.
Junior Engineer • Paper-I

The requirement gathering and analyze customer requirement is the responsibility of

A) System analyst
B) Administrator
C) Chief manager
D) Low level manager
In the Software Development Life Cycle (SDLC), the process of requirement gathering and analysis is a critical early phase. 1. **System Analyst**: This professional acts as a bridge between the business stakeholders (customers) and the technical team. Their primary responsibility is to interview customers, analyze their needs, document functional and non-functional requirements, and translate these into technical specifications (such as a Software Requirement Specification or SRS document) that developers can use to build the system. 2. **Administrator**: An administrator (like a System Administrator or Database Administrator) is typically responsible for the maintenance, configuration, and reliable operation of computer systems and servers after they are deployed, not for the initial requirement gathering phase. 3. **Chief Manager**: A Chief Manager handles high-level organizational strategy, budgeting, and resource allocation. While they may approve the project, they do not perform the detailed technical analysis of customer requirements. 4. **Low level manager**: A low-level manager (like a team lead) focuses on the day-to-day execution of tasks and managing the developers' workflow, rather than the initial phase of customer requirement elicitation.
Junior Engineer • Paper-I

To write a small number of mixed string and integer variable to a file, the appropriate function is

A) fputs()
B) fgets()
C) fprintf()
D) fwrite()
The question asks for a function capable of writing a 'mixed' set of data types (strings and integers) to a file. 1. **fprintf()**: This is the 'formatted print to file' function. Much like printf(), it uses format specifiers (e.g., %d for integers, %s for strings) to convert various data types into a text stream and write them to a file. This makes it the only appropriate choice for writing mixed data types in a human-readable format. 2. **fputs()**: This function is used exclusively for writing a null-terminated string to a file. It cannot handle integers or other data types without prior manual conversion to a string. 3. **fgets()**: This is an input function used to read a string from a file, not to write to one. 4. **fwrite()**: This is used for binary output. While it can write any data type, it writes the raw memory representation (binary) rather than a formatted string. It is typically used for writing blocks of data (like arrays or structs) rather than 'small numbers of mixed variables' intended for a text file.
Junior Engineer • Paper-I

It is a circuit, which has a number of input lines and selection lines with one output line

A) Sequential Circuit
B) Multiplexer
C) Counter
D) All of these
A Multiplexer (MUX), also known as a data selector, is a combinational logic circuit designed to select one of several analog or digital input signals and forward the selected input into a single output line. The selection of the specific input is controlled by a set of 'selection lines'. For example, a 4-to-1 multiplexer has 4 input lines, 2 selection lines (since 2^2 = 4), and 1 output line. Why other options are incorrect: - a. Sequential Circuit: This is a broad category of circuits where the output depends not only on current inputs but also on the history of inputs (it has memory). It does not specifically describe the input/selection/output structure mentioned. - c. Counter: A counter is a specific type of sequential circuit used to count pulses. It typically consists of flip-flops and does not function as a data selector with selection lines. - d. All of these: Since only the Multiplexer fits the specific definition provided, this option is incorrect.
Junior Engineer • Paper-I

Devices on one network can communicate with devices on another network via a .......

A) File Server
B) Utility Server
C) Printer Server
D) Gateway
Step-by-step reasoning: 1. The question asks for a device that enables communication between two different networks. 2. A 'Gateway' is a network node that connects two networks using different protocols. It acts as an 'entrance' or 'exit' point for a network, translating data from one protocol suite to another to allow communication between disparate networks (e.g., connecting a local area network to the internet). 3. Evaluating other options: (a) A File Server is used for storing and managing files accessible to users on a network, not for interconnecting networks. (b) A Utility Server provides specific services like DHCP or DNS to clients within a network. (c) A Printer Server manages print requests and distributes them to printers on a network. Therefore, only the Gateway serves the purpose of inter-network communication.
Junior Engineer • Paper-I

A device that links two homogenous packet-broadcast local networks is __________.

A) Hub
B) Gateway
C) Repeater
D) Bridge
Step-by-step reasoning: 1. **Understanding the Requirements**: The question asks for a device that links two 'homogenous' (same protocol/architecture) 'packet-broadcast local networks' (LANs). 2. **Analyzing the Options**: - **Hub (a)**: A hub is a physical layer (Layer 1) device that simply broadcasts incoming data to all other ports. It does not 'link' two separate networks in a logical sense; it extends a single collision domain. - **Gateway (b)**: A gateway is used to connect two 'heterogeneous' networks (networks using different protocols). It operates at the higher layers of the OSI model to translate data between different architectures. - **Repeater (c)**: A repeater is a Layer 1 device used to regenerate a signal to allow it to travel longer distances. It does not make filtering decisions or link distinct networks logically. - **Bridge (d)**: A bridge operates at the Data Link Layer (Layer 2). It is specifically designed to connect two separate LAN segments that use the same protocol (homogenous). It filters traffic by maintaining a MAC address table, ensuring that local broadcast traffic stays within its segment while allowing necessary packets to cross to the other segment. 3. **Conclusion**: Since the networks are homogenous and the goal is to link them, the Bridge is the correct device.
Junior Engineer • Paper-I

In order for the boundary between two frames to be unambiguously recognized by the flag patter, which of the following method is used.

A) Aloha
B) Bit stuffing
C) Loop
D) All of these
In data link layer framing, a 'flag' pattern (typically 01111110) is used to mark the beginning and end of a frame. However, if the actual data payload contains the same bit pattern as the flag, the receiver will mistakenly identify it as the end of the frame, leading to an error. To prevent this ambiguity, 'Bit Stuffing' is used. In bit stuffing, the sender inserts a '0' bit after every sequence of five consecutive '1's in the data. The receiver then removes any '0' that follows five consecutive '1's, ensuring that the flag pattern (six consecutive '1's) only appears at the actual boundaries of the frame. Why other options are incorrect: - a. Aloha: This is a Medium Access Control (MAC) protocol used in networking to handle collisions in shared channels, not a framing technique. - c. Loop: This is a general term (e.g., loopback or infinite loop) and is not a method for frame synchronization or boundary recognition.
Junior Engineer • Paper-I

For each instructions of program in memory the CPU goes through a

A) decode - fetch - execute sequence
B) execute - store - decode sequence
C) fetch - decode - execute sequence
D) fetch - execute - decode sequence
The process described in the question is known as the 'Instruction Cycle' (or the Fetch-Decode-Execute cycle), which is the basic operational process of a Central Processing Unit (CPU). 1. **Fetch**: The CPU retrieves the instruction from the memory address stored in the Program Counter (PC) and loads it into the Instruction Register (IR). 2. **Decode**: The Control Unit (CU) interprets the binary code of the instruction to determine what operation needs to be performed (e.g., addition, data movement, or a jump). 3. **Execute**: The CPU carries out the operation. This may involve the Arithmetic Logic Unit (ALU) performing a calculation or moving data between registers. Comparing this to the options: - Option (a) is incorrect because the CPU cannot decode an instruction before it has been fetched from memory. - Option (b) is incorrect because execution cannot happen before fetching and decoding. - Option (d) is incorrect because the CPU must understand (decode) what the instruction is before it can execute it.
Junior Engineer • Paper-I

When multidimensional arrays are assigned initial value

A) Rightmost subscript increases most rapidly
B) Leftmost subscript increases most rapidly
C) Rightmost subscript increases least
D) None of these
In C programming, multidimensional arrays are stored in 'row-major order'. This means that elements of the array are placed in contiguous memory locations, row by row. When initializing a multidimensional array (e.g., int arr[2][3] = {1, 2, 3, 4, 5, 6};), the compiler fills the array starting from the first element of the first dimension. For a 2D array, the second index (the rightmost subscript) changes for every consecutive element in memory, while the first index (the leftmost subscript) only changes after all elements of the current row have been filled. Therefore, the rightmost subscript increases most rapidly. For example, in arr[i][j], 'j' increments from 0 to (column_size - 1) before 'i' increments to the next row.
Junior Engineer • Paper-I

The statement FILE *ptr;

A) Defines a pointer to pre-defined structure type FILE
B) Defines a pointer to user defined structure type FILE
C) Defines a pointer to pre-defined data type FILE DESCRIPTOR
D) None of the above
`FILE *ptr;` declares `ptr` as a pointer to `FILE`. In C, `FILE` is a pre-defined type provided by the standard I/O library (`stdio.h`) and is typically implemented as a structure type used for file handling. So option (a) is correct. Why others are wrong: - (b) is incorrect because `FILE` is not a user-defined structure type in the program; it is a library-defined type. - (c) is incorrect because `FILE DESCRIPTOR` is not what `FILE` means in C; a file descriptor is a different concept (usually an integer in low-level OS APIs). - (d) is incorrect because option (a) correctly describes the declaration.
Junior Engineer • Paper-I

Why the decimal number system is also called as positional number system?

A) Since the values of the numbers are decided by multiplying the values.
B) Since the values of the numbers are decided by the weight of the values.
C) Since the values of the numbers are decided by adding the values.
D) Since the values of the numbers are decided by the position of the values.
A positional number system is a system of numeration in which the value of a digit is determined by its position (or place) within the number. In the decimal system (base-10), each position represents a power of 10. For example, in the number 555, the first '5' from the right represents 5 units (5 x 10^0), the second represents 5 tens (5 x 10^1), and the third represents 5 hundreds (5 x 10^2). Therefore, the same digit '5' has different values based on its position. Analysis of other options: - Option (a) is incorrect because multiplication is the method used to calculate the value, but the 'reason' it is called positional is the location of the digit, not the act of multiplying. - Option (b) is partially true in a technical sense (position determines weight), but 'position' is the fundamental definition of a positional system. - Option (c) is incorrect because addition is used to sum the weighted values, not to determine the value of an individual digit's position.
Junior Engineer • Paper-I

Which of the following are the channels defined by ISDN.

A) Bearer, Data and Hybrid.
B) Bearer, Data and Mesh.
C) Bearer, Bit and Mesh.
D) Baud, Bit and Hybrid.
ISDN (Integrated Services Digital Network) defines specific types of channels to handle different types of traffic and signaling. 1. **Bearer Channels (B-channels):** These are designed to carry the actual user data (voice, video, or data). In a standard Basic Rate Interface (BRI), there are two B-channels, each operating at 64 kbps. 2. **Data Channels (D-channels):** These are used for signaling and control information (call setup, teardown, and maintenance). In BRI, there is one D-channel operating at 16 kbps. 3. **Hybrid Channels:** These are channels that can be configured to act as either a Bearer channel or a Data channel depending on the network requirements and the specific service being provided. Analyzing the options: - Option (a) correctly lists Bearer, Data, and Hybrid channels. - Option (b) and (c) mention 'Mesh', which is a network topology, not an ISDN channel type. - Option (d) mentions 'Baud' (a unit of symbol rate) and 'Bit' (a unit of information), neither of which are channel types defined by ISDN.
Junior Engineer • Paper-I

The principle of detecting errors as close to their points of introduction as possible is known as

A) Phase containment of error
B) Self containment of error
C) Beta testing
D) Alpha testing
The principle of 'Phase Containment' in Software Engineering refers to the strategy of detecting and correcting defects within the same development phase in which they were introduced. For example, if a requirement error is found during the Requirements Analysis phase (via a review), it is 'contained' in that phase. If it is not found until the Testing phase, the cost of repair increases significantly. The goal is to prevent errors from 'leaking' into subsequent phases of the Software Development Life Cycle (SDLC). Why other options are incorrect: - b. Self containment of error: This is not a standard term in software engineering quality assurance; it sounds similar to phase containment but lacks a formal definition in this context. - c. Beta testing: This is a form of external acceptance testing where a sample of intended users try the product in a real environment. It happens at the end of the cycle, far from the point where most errors (like design or requirement errors) were introduced. - d. Alpha testing: This is internal testing performed by the organization's own staff before releasing the product to beta testers. While it detects errors, it is a specific testing phase, not the general principle of detecting errors as close to their origin as possible.
Junior Engineer • Paper-I

The number of allowed hops for an IP packet is kept in which of the following field.

A) AHF
B) IHL
C) TTL
D) ToS
The correct answer is TTL (Time to Live). 1. **TTL (Time to Live):** In an IP packet header, the TTL field is an 8-bit field used to prevent packets from circulating indefinitely in a network loop. Every time a packet passes through a router (a 'hop'), the router decrements the TTL value by 1. If the TTL reaches zero, the packet is discarded, and an ICMP 'Time Exceeded' message is typically sent back to the sender. Thus, it effectively limits the number of allowed hops. 2. **Why other options are incorrect:** - **AHF:** This is not a standard field in the basic IP header. (Authentication Header is part of IPsec, but not used for hop counting). - **IHL (Internet Header Length):** This field specifies the length of the IP header so that the receiving device knows where the header ends and the data begins. - **ToS (Type of Service):** This field is used for Quality of Service (QoS) to prioritize certain types of traffic (e.g., voice over data) to ensure better delivery performance.
Junior Engineer • Paper-I

In the expression float *fptr; which is represented as type float

A) The variable fptr
B) The address of fptr
C) The variable pointer to by fptr
D) None of these
In C programming, the declaration 'float *fptr;' defines a pointer variable named 'fptr'. 1. **The variable fptr (Option a):** The type of 'fptr' itself is 'float*', which means it is a 'pointer to a float'. It stores a memory address, not a floating-point value. 2. **The address of fptr (Option b):** The address of the pointer variable itself would be of type 'float**' (a pointer to a pointer to a float). 3. **The variable pointed to by fptr (Option c):** The asterisk (*) in the declaration indicates that 'fptr' will hold the address of a variable of type 'float'. Therefore, the data located at the address stored in 'fptr' (the dereferenced value) is represented as type 'float'. Thus, while 'fptr' is a pointer, the entity it points to is of type 'float'.
Junior Engineer • Paper-I

The SRS document is written using

A) End-user terminology
B) Technical terminology
C) Analysis terminology
D) None of these
The Software Requirements Specification (SRS) document serves as a formal agreement between the customer (end-user/client) and the developer. Its primary purpose is to describe what the system will do without detailing how it will be implemented. 1. Why 'End-user terminology' is correct: Since the client must review and sign off on the SRS to ensure the developers have correctly understood the business needs, the document must be written in language that the client understands. If it were written in deep technical jargon, the client would be unable to verify if the requirements are accurate. 2. Why 'Technical terminology' is incorrect: Technical terminology (e.g., specific database schemas, API protocols, or memory management) belongs in the Design Document (SDD), not the SRS. The SRS focuses on 'What' (requirements), while the SDD focuses on 'How' (implementation). 3. Why 'Analysis terminology' is incorrect: While analysts write the document, the terminology used must be accessible to the stakeholders. Analysis terminology often involves abstract modeling notations that may not be clear to the end-user.
Junior Engineer • Paper-I

The performance of cache memory is frequently measured in terms of a quantity called

A) miss ratio
B) hit ratio
C) latency ratio
D) read ratio
Cache memory is a small, high-speed memory that stores frequently accessed data to reduce the average time to access data from the main memory. The performance of a cache is primarily measured by how often the processor finds the required data in the cache rather than having to fetch it from the slower main memory. 1. **Hit**: When the CPU finds the requested data in the cache, it is called a 'cache hit'. 2. **Miss**: When the CPU does not find the requested data in the cache and must access main memory, it is called a 'cache miss'. 3. **Hit Ratio**: This is the ratio of cache hits to the total number of memory accesses (Hit Ratio = Hits / (Hits + Misses)). A higher hit ratio indicates better cache performance and faster system execution. Why other options are incorrect: - **Miss ratio**: While the miss ratio (1 - hit ratio) exists and is used to analyze performance, the primary positive metric for measuring cache efficiency is the hit ratio. - **Latency ratio**: Latency refers to the delay in accessing data, but 'latency ratio' is not a standard term used to measure the overall performance efficiency of a cache. - **Read ratio**: This is not a standard architectural term for measuring cache performance; cache performance is based on hits and misses regardless of whether the operation is a read or a write.
Junior Engineer • Paper-I

Instead of making a single estimate for each task, three estimates i.e pessimistic, likely and optimistic estimates are made in ________

A) Gantt charts
B) PERT charts
C) Critical charts
D) Task charts
The question refers to a specific estimation technique used in project management. 1. **PERT (Program Evaluation and Review Technique)**: PERT is specifically designed to handle uncertainty in task durations. It uses a weighted average of three time estimates to determine the 'expected time' for a task: - **Optimistic time (a)**: The minimum time required if everything goes perfectly. - **Pessimistic time (b)**: The maximum time required if everything goes wrong. - **Most Likely time (m)**: The most realistic estimate of the time required. The formula used is: Expected Time = (Optimistic + 4*Most Likely + Pessimistic) / 6. 2. **Gantt charts (Option a)**: These are bar charts used for scheduling and tracking progress. They show start and end dates but do not inherently use a three-point estimation system for calculating durations. 3. **Critical charts (Option c)**: This likely refers to the 'Critical Path Method' (CPM). Unlike PERT, CPM is a deterministic model that typically uses a single, fixed time estimate for each activity. 4. **Task charts (Option d)**: This is a generic term and not a standardized project management methodology involving three-point estimation. Therefore, the use of pessimistic, likely, and optimistic estimates is the defining characteristic of PERT charts.
Junior Engineer • Paper-I

BCD numbers are obtained

A) by converting decimal number to binary
B) by converting decimal to octal
C) when each decimal digit is represented by four bit binary
D) by converting binary to decimal.
BCD (Binary Coded Decimal) numbers are obtained when each decimal digit is represented separately by a 4-bit binary code. For example, decimal 59 is written in BCD as 0101 1001, where 5 = 0101 and 9 = 1001. Option (c) is therefore correct. Option (a) is incorrect because converting a decimal number to binary gives the pure binary representation of the whole number, not digit-by-digit coding. Option (b) is incorrect because octal conversion has no relation to BCD. Option (d) is incorrect because converting binary to decimal is the reverse process and does not define BCD.
Junior Engineer • Paper-I

Binary equivalent of decimal number 25 is

A) 011001
B) 011111
C) 010011
D) 111111
Decimal 25 in binary is obtained by expressing 25 as a sum of powers of 2: 25 = 16 + 8 + 1 = 2^4 + 2^3 + 2^0. So the binary form is 11001. Among the given options, 011001 represents the same value with a leading zero, so option (a) is correct. Why others are incorrect: 010011 = 19, 011111 = 31, and 111111 = 63 in decimal, so they do not represent 25.
Junior Engineer • Paper-I

Which of the following are unary operators in C? (i) ! (ii) Sizeof (iii) ~ (iv) &&

A) i, ii
B) i, iii
C) ii, iv
D) i, ii, iii
Unary operators act on a single operand. In C, ! (logical NOT), sizeof (size/operand operator), and ~ (bitwise NOT) are unary operators, so (i), (ii), and (iii) are correct. The operator && is the logical AND operator, which is binary because it requires two operands, so (iv) is not unary. Therefore, option d (i, ii, iii) is correct. Option a is incorrect because it omits ~. Option b is incorrect because it omits sizeof. Option c is incorrect because && is not unary and ! is missing.
Junior Engineer • Paper-I

A compiler is

A) Machine-independent and OS-independent
B) Machine-dependent and OS-dependent
C) Machine-dependent and OS-independent
D) Machine-independent-OS-dependent
A compiler is a program that translates source code written in a high-level language into machine code (object code) that can be executed by a specific CPU. 1. **Machine-dependent**: The final output of a compiler (the target code) must be written in the instruction set architecture (ISA) of the specific processor (e.g., x86, ARM, RISC-V). Since different machines have different instruction sets, the back-end of the compiler must be tailored to the specific machine. 2. **OS-dependent**: The generated code must interact with the Operating System for memory management, system calls, and I/O operations. Different operating systems (e.g., Windows, Linux, macOS) have different Application Binary Interfaces (ABIs), different system call conventions, and different executable file formats (e.g., PE for Windows, ELF for Linux). Therefore, a compiler must be aware of the target OS to produce a functional executable. While the 'front-end' of a compiler (lexical and syntax analysis) is generally machine-independent, the compiler as a whole—specifically the code generator—is fundamentally dependent on both the hardware architecture and the operating system.
Junior Engineer • Paper-I

COCOMO classified any software development project into _______ categories based on the development complexity.

A) 2
B) 3
C) 4
D) 5
COCOMO (Constructive Cost Model), developed by Barry Boehm, classifies software projects into three distinct categories based on the complexity of the software and the nature of the development environment: 1. Organic: Relatively small, simple software projects developed by small teams with a good understanding of the problem domain. The requirements are flexible and the environment is stable. 2. Semi-detached: An intermediate level of complexity. These projects involve a mix of experienced and inexperienced staff and have a mix of rigid and flexible requirements. 3. Embedded: Highly complex projects developed under tight constraints (hardware, software, and operational). These are typically critical systems (e.g., air traffic control or medical systems) where requirements are very rigid. Since there are exactly three categories (Organic, Semi-detached, and Embedded), option 'b' is the correct answer.
Junior Engineer • Paper-I

The register which keeps track of the execution of a program and which contains the memory address of the next instruction to be executed is known as

A) index register
B) instruction register
C) memory address register
D) program counter
The Program Counter (PC) is a dedicated processor register that stores the memory address of the next instruction to be fetched and executed. Once an instruction is fetched, the PC is automatically incremented to point to the next sequential instruction, unless a jump or branch instruction modifies its value. Why other options are incorrect: - a. Index Register: Used for modifying operand addresses during the execution of a program (often used in array indexing). - b. Instruction Register (IR): Holds the actual instruction that is currently being decoded and executed, not the address of the next one. - c. Memory Address Register (MAR): Holds the memory address from which data will be fetched to the CPU, or the address to which data will be sent and stored. While it holds an address, it is a general-purpose interface to memory, whereas the PC specifically tracks program execution flow.
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