MES Jr. Grade • 2020 • Technical Paper-II
In calculating NPSH values of hydraulic pump, pressure to be considered is :-
A)
Minimum anticipated barometric pressure
B)
Maximum anticipated vapour pressure
C)
Maximum anticipated pressure of both barometric and vapour pressure
D)
Minimum anticipated barometric pressure and maximum anticipated vapour pressure
NPSH (Net Positive Suction Head) depends on the pressure available at the pump suction. For safe pump operation, we consider the worst-case condition: the barometric pressure should be taken at its minimum anticipated value, and the vapour pressure of the liquid at its maximum anticipated value. This gives the least available NPSH and helps avoid cavitation. Therefore, option (d) is correct. Options (a), (b), and (c) are incomplete or incorrect because NPSH calculation must account for both the minimum atmospheric pressure and maximum vapour pressure together.
MES Jr. Grade • 2020 • Technical Paper-II
In a hydraulic structure where a supercritical stream meets a subcritical stream of sufficient depth, there will be :-
A)
No change in the energy
B)
No flow of stream possible
C)
Magnification of energy
D)
Dissipation of energy
When a supercritical stream meets a subcritical stream of sufficient depth, a hydraulic jump forms. In a hydraulic jump, part of the kinetic energy is converted into turbulence and heat, so there is a significant loss of energy. Therefore, the correct answer is dissipation of energy. The other options are incorrect because energy is not conserved across the jump, flow is certainly possible, and energy does not increase.
MES Jr. Grade • 2018 • Paper-III
A master slave configuration consists of two identical flip-flops connected in such a way that output of the master is input to slave. Which one of the following is correct?
A)
master is level triggered and salve is edge triggered.
B)
master is edge triggered and salve is level triggered.
C)
master is positive edge triggered and slave is negative edge triggered.
D)
master is negative edge triggered and slave is positive edge triggered.
In a master-slave flip-flop, two level-sensitive latches are connected in cascade and controlled by complementary clock phases. The master responds during one half of the clock cycle, while the slave responds during the opposite half. Effectively, the master captures the input when the clock is low-to-high complementary phase arrangement is considered, and the slave updates the output on the opposite transition. Among the given options, this behavior is best represented by: master is negative edge triggered and slave is positive edge triggered. Options (a) and (b) are incorrect because master-slave operation is not a combination of one level-triggered and one edge-triggered flip-flop. Option (c) reverses the usual complementary triggering order given in this form of the question.
MES Jr. Grade • 2018 • Paper-III
Explain different addressing modes of 8085.
MES Jr. Grade • 2018 • Paper-III
When the gate-to-source (VGS) of a MOSFET with threshold voltage of 400 mV, working in saturation is 900mV, the drain current is observed to be 1mA. Neglecting the channel width modulation effect and assuming that the MOSFET is operating at saturation, the drain current for an applied VGS of 1400mV is:
A)
0.5 mA
B)
2.0 mA
C)
3.5 mA
D)
4.0 mA
For a MOSFET in saturation, neglecting channel length modulation, drain current is given by: ID ∝ (VGS − Vth)^2. Here, threshold voltage Vth = 400 mV. When VGS = 900 mV, overdrive voltage = 900 − 400 = 500 mV, and ID = 1 mA. When VGS = 1400 mV, overdrive voltage = 1400 − 400 = 1000 mV. Therefore, current scales as the square of the ratio: ID2 / ID1 = (1000 / 500)^2 = 2^2 = 4. Hence ID2 = 4 × 1 mA = 4.0 mA. So the correct option is (d). Other options do not satisfy the square-law relationship of MOSFET saturation current.
MES Jr. Grade • 2018 • Paper-III
In a JK flip-flop we have J=0 and K=1. Assuming the flip-flop was initially cleared and then clocked for 6-pulses, the sequence at the Q output will be:
A)
010000
B)
011001
C)
010010
D)
010101
For a JK flip-flop, when J = 0 and K = 1, the flip-flop goes to the reset state on every active clock pulse, so Q(next) = 0 regardless of the previous state. The flip-flop is initially cleared, so Q = 0. During the first clock pulse it remains 0, and for all subsequent pulses it also remains 0. Among the given options, the sequence represented is 010000, which matches the expected exam convention starting from the initial cleared state followed by the output staying LOW. The other options show toggling or setting behavior, which do not occur for J = 0, K = 1.
MES Jr. Grade • 2018 • Paper-III
12 MHz clock frequency is applied to a cascaded counter of MOD-3 counter, MOD-4 counter and MOD-5 counter. What are the lowest output frequency and the overall MOD respectively?
A)
200 KHz, 50
B)
1 MHz, 60
C)
3 MHz, 12
D)
4 MHz, 12
For cascaded counters, the overall modulus is the product of individual moduli: 3 × 4 × 5 = 60. Hence overall MOD = 60. The output frequency is the input clock divided by the overall modulus: 12 MHz ÷ 60 = 0.2 MHz = 200 kHz. So the correct frequency should be 200 kHz with MOD 60. However, that exact pair is not present in the options. Among the given choices, option (b) has the correct overall MOD (60), but its frequency is incorrect. Therefore, the question/options appear inconsistent.
MES Jr. Grade • 2018 • Paper-III
In the case-code amplifier shown in figure, if the common-emitter stage (Q1) has a transconductance gm1, and the common base stage (Q2) has a transconductance gm2, the gain of the cascade amplifier is:
A)
gm1
B)
gm1/gm2
C)
gm1/2
D)
gm1/2gm2
In a cascode amplifier, the first transistor (Q1) in common-emitter mode provides the main voltage gain, while the common-base transistor (Q2) mainly increases output resistance and improves bandwidth. The overall small-signal gain is approximately the gain of the CE stage multiplied by the effect of the CB stage, which gives a cascade gain proportional to gm1/gm2. Therefore, the correct option is gm1/gm2. The other options do not represent the standard cascode gain relation.
MES Jr. Grade • 2018 • Paper-III
Use K-map to minimize the following sop expression: ABCD + ABCD + ABCD + ABCD + ABCD + ABCD + ABCD + ABCD
MES Jr. Grade • 2018 • Paper-III
Consider the transistor circuit given below. The transistors have high values of β and VCE = 0.65 Volts. The current I flowing through the 2 KΩ resistance will be:
A)
1 mA
B)
3.33 mA
C)
0 mA
D)
5 mA
With high β, the base currents are negligible, so the transistor pair behaves like a current mirror. The emitter/collector junctions are assumed to be at VCE ≈ 0.65 V, so the voltage across the 2 kΩ resistor is set by the supply and the transistor drop. From the circuit, this gives a resistor current of I = 6.66 V / 2 kΩ = 3.33 mA. Hence option (b) is correct.
Why others are wrong:
- (a) 1 mA: would require only 2 V across the 2 kΩ resistor, which is not consistent with the given transistor drop and circuit bias.
- (c) 0 mA: impossible because the transistor is biased on and the resistor has a nonzero voltage across it.
- (d) 5 mA: would require 10 V across 2 kΩ, which exceeds the available effective voltage in the circuit.
MES Jr. Grade • 2018 • Paper-III
The decoding error of the counter can be avoided by:
A)
increasing propagation delay of flip-flops used in the counter
B)
using very fast logic
C)
using the strobe signal
D)
reducing the propagation delay of flip-flops used in the counter
In ripple/asynchronous counters, the flip-flops do not change state at exactly the same instant because each flip-flop has propagation delay. During transition, temporary intermediate states may appear, causing decoding errors or false outputs. This problem is avoided by using a strobe signal, so the decoder output is sampled only after the counter has settled to the correct state.
Why others are incorrect: (a) Increasing propagation delay makes the transient problem worse. (b) Very fast logic may respond even more easily to false intermediate states. (d) Reducing propagation delay helps speed, but does not completely eliminate decoding glitches in asynchronous counters.
MES Jr. Grade • 2018 • Paper-III
With the neat diagram explain the class B Push-Pull amplifier?
MES Jr. Grade • 2018 • Paper-III
In the energy band diagram of an open circuited pn junction, the energy band of n-region has shifted relative to that of p-region:
A)
downward by E0
B)
upward by E0
C)
downward by E0/2
D)
upward by E0/2
In an open-circuited pn junction at equilibrium, the Fermi level must be constant throughout the junction. To achieve this, the energy bands bend so that the n-side bands lie lower than the p-side bands by an amount equal to the built-in barrier energy E0. Hence, the energy band of the n-region is shifted downward relative to that of the p-region by E0.
Why others are incorrect:
- (b) upward by E0: wrong direction of shift.
- (c) downward by E0/2: wrong magnitude.
- (d) upward by E0/2: wrong direction and magnitude.
MES Jr. Grade • 2018 • Paper-III
Draw block diagram of 8253 and setup it as square wave generator with 1msec period if input frequency 1MHZ.
MES Jr. Grade • 2018 • Paper-III
A step up-down (Buck-Boost) chopper has input dc voltage of 220 V and output voltage of 660 V. If the conduction time of the chopper is 120µs, compute the pulse width of the load voltage. In case the pulse width of load voltage is increased to three times its previous width, for constant frequency operation, calculate the new value of average output voltage.
MES Jr. Grade • 2018 • Paper-III
AC-to-DC circulating current dual converters are operated with the following relationship between their triggering angles (α1 and α2):
A)
α1 + α2 = 180°
B)
α1 + α2 = 360°
C)
α1 - α2 = 180°
D)
α1 + α2 = 90°
In a circulating-current dual converter, two fully controlled converters are connected in antiparallel and operate simultaneously. To keep their average DC output voltages equal in magnitude and opposite in polarity, their firing angles must satisfy the relation α1 + α2 = 180°. This prevents unwanted net voltage difference between the converters and limits circulating current to the reactor-controlled value. Hence option (a) is correct. Options (b), (c), and (d) do not satisfy the required dual-converter operating condition.
MES Jr. Grade • 2018 • Paper-III
The feedback diodes in a d.c. to a.c. thyristor inverter:
A)
Freewheel the load current
B)
Provide reverse bias effectively to the thyristors for turn-off
C)
Improve the switching properties of the inverter
D)
Improve the harmonic distortion of the inverter output current
In a d.c. to a.c. thyristor inverter, feedback diodes (also called freewheeling or return diodes) are connected to provide a path for the load current, especially when the load is inductive and current cannot change instantaneously. Thus they freewheel the load current and return stored energy to the source.
Why others are incorrect: (b) Reverse bias for thyristor turn-off is mainly achieved by the commutation circuit, not by feedback diodes directly. (c) They do not primarily improve switching properties; their main role is current feedback/freewheeling. (d) They are not used mainly for harmonic improvement of output current.
MES Jr. Grade • 2018 • Paper-III
A ROM is used to store the table for multiplication of two 8-bit unsigned integers. The size of the ROM should be:
A)
256 x 16
B)
64K x 8
C)
4K x 16
D)
64K x 16
To store the multiplication table of two 8-bit unsigned integers, the ROM must take both numbers as inputs. Each 8-bit number contributes 8 address lines, so total address bits = 8 + 8 = 16. Hence, number of addresses = 2^16 = 65536 = 64K. The product of two 8-bit unsigned numbers can be as large as 255 x 255 = 65025, which requires 16 bits to store. Therefore, the required ROM size is 64K x 16.
Why others are incorrect: (a) 256 x 16 allows only 2^8 combinations, not enough for two 8-bit inputs. (b) 64K x 8 has enough addresses but only 8-bit output, insufficient for the product. (c) 4K x 16 has only 2^12 addresses, also insufficient.
MES Jr. Grade • 2018 • Paper-III
High power efficiency of the push-pull amplifier is due to the fact that:
A)
each transistor conductors on different cycle of the input
B)
transistors are placed in CE configuration
C)
there is no quiescent collector current
D)
low forward biasing voltage is required
A push-pull amplifier usually operates in Class B mode, where each transistor conducts for one half-cycle of the input signal. Because of this arrangement, ideally no collector current flows when there is no input signal, i.e., there is no quiescent collector current. This greatly reduces power loss at idle and gives high power efficiency.
Why others are incorrect: (a) Half-cycle conduction is true, but the main reason for high efficiency is the absence of quiescent current. (b) CE configuration is not the reason for high efficiency. (d) Forward bias voltage requirement is unrelated to the main efficiency advantage.
MES Jr. Grade • 2018 • Paper-III
If the input to the digital circuit consisting of a cascade of 20 EX-OR gates is X, then the output of Y is equal to:
A)
0
B)
1
C)
X
D)
X̅
An EX-OR gate gives 0 when both inputs are same and gives the input itself when one input is 0. In the standard cascade interpretation of this question, the signal X passes through 20 EX-OR stages in such a way that inversion by XOR occurs an even number of times. Since EX-OR applied repeatedly an even number of times returns the original input, the final output is Y = X. Hence option (c) is correct. Options (a) and (b) are constants, so they are incorrect, and option (d) would occur only for an odd number of effective inversions.
MES Jr. Grade • 2018 • Paper-III
Consider the case that noise phase modulates the FM wave. As the noise sideband frequency approaches the carrier frequency, the noise amplitude:
A)
remains constant
B)
is decreased
C)
is increase
D)
is equalised
In an FM system, noise near the carrier mainly produces phase modulation of the FM wave. For phase modulation, the effect of a noise sideband becomes more significant as its frequency gets closer to the carrier frequency. Thus, as the noise sideband frequency approaches the carrier frequency, the equivalent noise amplitude increases.
Why others are incorrect:
- (a) remains constant: incorrect, because the noise effect is frequency-dependent.
- (b) is decreased: incorrect, the opposite happens near the carrier.
- (d) is equalised: incorrect, there is no such equalisation effect here.
MES Jr. Grade • 2018 • Paper-III
The contents of Register (B) and Accumulation (A) of 8085 microprocessor are 49 H and 3AH respectively. The contents of A and the status of carry flag (CY) and sign flag (S) after executing SUB B instructions are:
A)
A=F1, CY=1, S=1
B)
A=0F, CY=1, S=1
C)
A=F0, CY=0, S=0
D)
A=1F, CY=1, S=1
In 8085, `SUB B` means A ← A − B. Given A = 3AH and B = 49H:
1. Compute subtraction: 3A − 49 = -0F(H).
2. In 8-bit 2’s complement form, -0F(H) = F1(H).
So the new content of A = F1H.
3. Since A < B, a borrow is needed. In 8085 subtraction, borrow sets the carry flag, so CY = 1.
4. The sign flag depends on the most significant bit of the result. F1H = 11110001₂, whose MSB is 1, so S = 1.
Therefore the correct option is (a). Other options have incorrect result and/or incorrect flag status.
MES Jr. Grade • 2018 • Paper-III
Explain single side band modulation. Explain any one method of generation of SSB waves. Draw neat diagrams wherever necessary.
MES Jr. Grade • 2018 • Paper-III
Which one of the following statements is correct in respect of BJT?
A)
Avalanche multiplication starts when the reverse biased collector-base voltage VCB equals the avalanche breakdown voltage BV CBO.
B)
The early effect starts as soon as punch through occurs in a transistor.
C)
The small signal current gain hfe = large signal current gain hFE when ∂IC/∂IE = 0.
D)
In the CE mode, a transistor can be cut off by reducing IB to zero.
In a BJT operating in common-emitter (CE) mode, collector current is controlled by base current. If base current IB is reduced to zero, the transistor goes to cutoff (ignoring small leakage current), so option (d) is correct.
Why others are incorrect:
(a) Avalanche breakdown across collector-base junction depends on transistor conditions; the onset in a transistor is not simply stated this way as a general correct operating statement.
(b) Early effect is base-width modulation due to increase in reverse collector-base voltage; it starts before punch-through, not when punch-through occurs.
(c) Small-signal gain hfe = dIC/dIB, while large-signal gain hFE = IC/IB. They are not made equal by the condition given, and ∂IC/∂IE = 0 is irrelevant here.
MES Jr. Grade • 2018 • Paper-III
With the neat diagram explain the working of two-stage RC-coupled amplifier.
