Past Questions — 2025

To determine the maximum directly addressable memory of a microprocessor, we look at the size of its address bus. 1. The Intel 8085 is an 8-bit microprocessor, but it has a 16-bit address bus (A0 to A15). 2. The number of unique memory locations that can be addressed is calculated as 2 raised to the power of the number of address lines: 2^16. 3. 2^16 = 65,536 bytes. 4. Since 1 KB (Kilobyte) is defined as 1,024 bytes, we divide 65,536 by 1,024: 65,536 / 1,024 = 64 KB. Therefore, the 8085 can directly address up to 64 KB of memory. Analysis of other options: - 32 KB: This is half of the 8085's capacity. - 128 KB: This would require a 17-bit address bus (2^17). - 1 MB: This is the addressable memory of the 8086 microprocessor, which has a 20-bit address bus (2^20).

In Amplitude Modulation (AM), the amplitude of the high-frequency carrier wave is varied in proportion to the instantaneous amplitude of the modulating (message) signal. By definition, the fundamental characteristics of the carrier wave—its frequency and phase—remain constant throughout the modulation process. 1. Why Option (a) is correct: In AM, only the 'Amplitude' is modulated. The frequency of the carrier remains fixed at its original value (f_c). 2. Why Option (b) is incorrect: The very definition of Amplitude Modulation is that the amplitude changes; therefore, it does not remain the same. 3. Why Option (c) is incorrect: A carrier wave must have a non-zero frequency to propagate information through a medium; a frequency of zero would be a DC signal, not a carrier. 4. Why Option (d) is incorrect: Infinite frequency is physically impossible and not used in communication systems.

Step-by-step reasoning: 1. **Definition of Reverse Bias**: In a diode, reverse bias occurs when the positive terminal of the power source is connected to the n-type material and the negative terminal to the p-type material, preventing current flow under normal conditions. 2. **Breakdown Phenomenon**: If the reverse voltage is increased beyond a certain critical limit, the diode undergoes 'breakdown' (either Zener or Avalanche breakdown), leading to a sudden, massive increase in current which can permanently damage the device unless it is specifically designed for it (like a Zener diode). 3. **Peak Inverse Voltage (PIV)**: PIV is defined as the maximum reverse-bias voltage that a diode can withstand without breaking down. It is a critical rating for designers, especially when selecting diodes for rectifier circuits. Evaluating other options: - **Voltage regulation (b)**: This refers to the ability of a power supply to maintain a constant output voltage regardless of changes in load or input voltage. - **Ripple voltage (c)**: This is the residual AC component remaining in the output of a DC power supply after rectification and filtering. - **Peak output voltage (d)**: This is simply the maximum voltage delivered at the output terminal of a circuit during its cycle.

For a single-phase full converter, the average DC output voltage is Vdc = (2Vm/\u03c0) cos\u03b1 Given Vm = 200 V and \u03b1 = 60\u00b0: Vdc = (2 \u00d7 200 / \u03c0) cos 60\u00b0 = (400 / \u03c0) \u00d7 0.5 = 200 / \u03c0 \u2248 63.7 V So the correct option is **b) 63.7 V**. Why the others are incorrect: - **a) 67.7 V**: close numerically, but not the correct result from the formula. - **c) 127.4 V**: this would correspond to using cos 0\u00b0 = 1 or a different firing angle, not 60\u00b0. - **d) 200 V**: this is the peak input voltage Vm, not the average DC output of the converter.

The instruction 'JNZ' stands for 'Jump if Not Zero'. In microprocessor architecture (such as the 8085 or 8086), this is a conditional jump instruction that depends on the state of the Zero Flag (Z). 1. The Zero Flag (Z) is set to 1 if the result of the previous arithmetic or logical operation is zero. 2. The Zero Flag (Z) is reset to 0 if the result of the previous operation is non-zero. 3. Since JNZ triggers a jump only when the result is NOT zero, it checks if the Zero Flag is equal to 0. Analysis of options: - Option (a): If Zero flag = 1, the result is zero, so JNZ will not jump (JZ would jump). - Option (b): If Zero flag = 0, the result is non-zero, so JNZ will execute the jump. This is correct. - Option (c): The Sign flag is used for instructions like JS (Jump if Sign) or JNS (Jump if No Sign). - Option (d): The Carry flag is used for instructions like JC (Jump if Carry) or JNC (Jump if No Carry).

After `MVI A, A7H`, the accumulator contains `A7H` = `1010 0111` in binary. `ORA A` performs bitwise OR of A with itself, so the accumulator remains unchanged: `A7H`. Then `RLC` (Rotate Left Circular) shifts all bits left by one position; the MSB moves into the LSB and also into the carry. Thus `1010 0111` becomes `0100 1111`, which is `4FH`. Therefore the correct answer is `b`, not `a`. Why others are incorrect: - `a) CFH`: would correspond to a different rotation/result, not the actual circular left rotate of `A7H`. - `c) 4EH`: this would be the result of a left shift without wrapping the MSB into the LSB. - `d) CEH`: also does not match the circular rotation outcome. Correct option: `b`.

In the 8085 microprocessor architecture, Register A is a special-purpose 8-bit register known as the Accumulator. It is the primary register used for arithmetic and logical operations. Most instructions that perform calculations (like ADD, SUB, AND, OR) use the Accumulator as one of the operands and store the final result back into it. Why other options are incorrect: - a. Counter: The 8085 does not have a dedicated 'Counter' register; counting is typically implemented using general-purpose registers (B, C, D, E, H, L) via software loops. - b. Flag: The Flag register is a separate 8-bit register that stores the status of the result of the last operation (e.g., Zero, Carry, Sign flags), not Register A. - d. Register: While Register A is technically a register, 'Accumulator' is the specific functional name for it. In the context of multiple-choice questions, the most precise technical term is required.

The Intel 8085 is an 8-bit microprocessor, which means its internal data bus and external data lines are 8 bits wide. This allows it to process 8 bits of data in a single operation. To access memory and I/O devices, it uses a 16-bit address bus. A 16-bit address bus allows the microprocessor to address 2^16 unique memory locations, which equals 65,536 bytes (64 KB) of memory. Analysis of options: - Option (a) is correct: 8 data lines (8-bit processor) and 16 address lines (64 KB addressable space). - Option (b) is incorrect: The 8085 is not a 16-bit data processor. - Option (c) is incorrect: The 8085 does not have 16 data lines. - Option (d) is incorrect: 8 address lines would only allow for 2^8 (256) memory locations, which is insufficient for a general-purpose microprocessor.

In a uniform quantizer, the quantization noise power (also known as quantization error variance) is given by the formula: Pq = (Δ^2) / 12, where Δ is the step size. The step size Δ is defined as Δ = (Vmax - Vmin) / L, where (Vmax - Vmin) is the full-scale range of the signal and L is the number of quantization levels. Substituting Δ into the power formula, we get: Pq = ((Vmax - Vmin)^2) / (12 * L^2). From this expression, it is evident that the quantization noise power (Pq) is inversely proportional to the square of the number of quantization levels (L^2). Increasing the number of levels reduces the step size, thereby reducing the noise power. Options a, b, and d are incorrect because the noise power depends on the resolution of the quantizer (L), not on the sampling rate, the signal power, or the bandwidth of the system.

Automatic Generation Control (AGC) is a system used in power system operation to maintain the system frequency and the scheduled tie-line power flows between control areas. 1. **Function of AGC**: The primary goal of AGC is to adjust the power output of multiple generators in real-time to match the load demand. Since frequency is directly related to the rotational speed of the generators, AGC acts as a high-level controller that sends signals to the speed governors of the generators. 2. **Speed-governing**: The microprocessor in an AGC system calculates the Area Control Error (ACE) and adjusts the speed-changer settings of the turbine governors to maintain the frequency at its nominal value (e.g., 50Hz or 60Hz). 3. **Load Sharing**: AGC ensures that the total load is distributed among the available generating units according to their economic characteristics or predefined sharing ratios (Economic Dispatch). 4. **Analysis of other options**: - (a) Billing is a commercial function handled by metering and billing software, not by the real-time control loop of AGC. - (c) Transmission switching is handled by SCADA (Supervisory Control and Data Acquisition) or protective relaying systems, not by the generation control loop.

In Amplitude Modulation (AM), the modulated signal consists of a carrier frequency (fc) and two sidebands: the Upper Sideband (USB) and the Lower Sideband (LSB). If the modulating signal (the message signal) has a maximum frequency of fm, the resulting AM spectrum contains frequencies at fc, (fc + fm), and (fc - fm). The bandwidth (BW) is defined as the difference between the highest and lowest frequency components of the signal. Therefore, BW = (fc + fm) - (fc - fm) = 2fm. This means the bandwidth of a standard AM signal is exactly twice the highest frequency present in the modulating signal. Analysis of other options: - Option (a) is incorrect because the carrier frequency is the center frequency, not the width of the spectrum. - Option (c) is incorrect as the sum of frequencies does not represent the spectral width. - Option (d) is incorrect as it underestimates the required bandwidth by a factor of four.