Past Questions

KCL and Ohm’s law is the best answer because it directly satisfies the fact, principle, or condition asked in the question.

In a Bipolar Junction Transistor (BJT), the leakage current (specifically the reverse saturation current) is highly sensitive to temperature changes. The leakage current $I_{CEO}$ (Collector-to-Emitter leakage current with the base open) is caused by the flow of minority carriers across the reverse-biased junction. As temperature increases, more electron-hole pairs are thermally generated in the semiconductor material, leading to a significant increase in the concentration of minority carriers. A general rule of thumb in semiconductor physics is that the reverse saturation current approximately doubles for every 10°C rise in temperature. Analyzing the other options: - (a) Output resistance typically decreases or remains relatively stable compared to the exponential rise of leakage current. - (c) Current gain ($\beta$) generally increases slightly with temperature because the current gain is proportional to the mobility of carriers and the base transport factor, though this effect is less 'noticeable' or dominant than the leakage current surge. - (d) While AC current gain may change, the most immediate and critical thermal instability in a CE configuration is the increase in $I_{CEO}$, which can lead to thermal runaway.

The threshold voltage (Vth) of an n-channel MOSFET is the gate-to-source voltage required to create an inversion layer of electrons at the silicon-oxide interface. The formula for Vth is approximately: Vth = VFB + 2φF + (√2εs q N_A (2φF)) / Cox, where N_A is the acceptor dopant concentration of the p-type substrate (channel) and Cox is the oxide capacitance. 1. **Increasing channel dopant concentration (N_A):** As N_A increases, the amount of negative charge (ionized acceptors) in the depletion region increases. To overcome this increased negative charge and achieve inversion, a higher positive gate voltage is required. Therefore, increasing the dopant concentration increases Vth. This makes option (a) correct. 2. **Reducing channel dopant concentration:** This would decrease the charge in the depletion region, making it easier to form the inversion layer, thereby decreasing Vth. Thus, option (b) is incorrect. 3. **Reducing gate-oxide thickness (t_ox):** Reducing the thickness increases the oxide capacitance (Cox = ε_ox / t_ox). Since Cox is in the denominator of the depletion charge term in the Vth equation, increasing Cox reduces the voltage required to deplete the channel, thereby decreasing Vth. Thus, option (c) is incorrect. 4. **Reducing channel length:** While reducing channel length can lead to the 'Short Channel Effect' (which typically causes Vth to decrease, known as Vth roll-off), it is not a primary method used to increase Vth. In standard MOSFET physics, reducing length generally lowers the threshold voltage. Thus, option (d) is incorrect.

The Free Electron Theory (specifically the Drude model and the Sommerfeld model) is based on the fundamental assumption that the valence electrons in a metal are 'free' to move throughout the volume of the metal. To simplify the physics, the theory assumes that the interior of the metal is a region of constant potential (often taken as zero), meaning the electrons do not experience any internal forces or periodic potentials from the ion cores while moving. The only potential barrier exists at the surface of the metal, which prevents the electrons from escaping (the work function). Why other options are incorrect: - b. Sinusoidal potential: This describes the periodic potential used in the 'Nearly Free Electron Model' or 'Bloch's Theorem' to account for the crystal lattice, but the basic Free Electron Theory ignores this. - c. Square-wave potential: This is not a standard assumption for the bulk behavior of electrons in metals. - d. A superconductor: This is a state of matter/property of certain materials at low temperatures, not a type of potential that electrons are subjected to within the general free electron theory.

To solve this problem, we use the fundamental properties of planar graphs and their duals. 1. **Given Data**: - Number of nodes (V) = 4 - Number of elements/edges (E) = 5 2. **Euler's Formula for Planar Graphs**: For a connected planar graph, the relationship between vertices (V), edges (E), and faces (F) is given by: V - E + F = 2 Substituting the given values: 4 - 5 + F = 2 -1 + F = 2 F = 3 3. **Understanding Faces and Meshes**: The total number of faces (F) includes the 'outer' (infinite) face. The number of meshes (M) in the original network is the number of bounded faces: M = F - 1 = 3 - 1 = 2 4. **Properties of the Dual Network**: In graph theory, the dual of a planar graph is constructed such that: - The number of nodes in the dual network (V') equals the number of faces in the original network (F). - The number of edges in the dual network (E') equals the number of edges in the original network (E). - The number of faces in the dual network (F') equals the number of nodes in the original network (V). 5. **Calculating Meshes in the Dual Network**: The number of meshes in the dual network (M') is the number of bounded faces of the dual graph: M' = F' - 1 Since F' = V (from the dual property), we have: M' = V - 1 M' = 4 - 1 = 3 Wait, let's re-evaluate the definition of 'mesh' in the context of network topology for this specific exam. In many electrical network textbooks, the number of independent meshes is given by the formula: M = E - (V - 1). For the original network: M = 5 - (4 - 1) = 5 - 3 = 2. For the dual network: Nodes (V') = F = 3 Edges (E') = E = 5 Meshes (M') = E' - (V' - 1) = 5 - (3 - 1) = 5 - 2 = 3. Correction: Let's re-read the question. 'The number of meshes in its dual network'. Original: V=4, E=5. Dual: V'=3, E'=5. Meshes in Dual = E' - V' + 1 = 5 - 3 + 1 = 3. However, looking at the standard relationship: The number of meshes in the original network equals the number of nodes in the dual network minus one, and the number of nodes in the original network minus one equals the number of meshes in the dual network. Nodes of original (V) = 4. Meshes of dual (M') = V - 1 = 4 - 1 = 3. Wait, let me re-calculate. Original: V=4, E=5, F=3. Dual: V'=3, E'=5, F'=4. Meshes in Dual = F' - 1 = 4 - 1 = 3. Looking at the options provided (a. 4, b. 3, c. 2, d. 1), the calculated value is 3. Re-checking the logic: Original Graph G: V=4, E=5. Faces F = E - V + 2 = 5 - 4 + 2 = 3. Dual Graph G*: V* = F = 3, E* = E = 5. Faces F* = E* - V* + 2 = 5 - 3 + 2 = 4. Meshes in G* = F* - 1 = 4 - 1 = 3. Therefore, the correct option is b.

In material science, vacant lattice sites are known as vacancies (a type of point defect). In halide crystals (such as NaCl or KCl), these vacancies play a critical role in the transport of matter and charge: 1. Diffusion: For an atom or ion to move through a crystal lattice, it typically requires an adjacent empty site to jump into. Therefore, the rate of diffusion is directly proportional to the concentration of vacancies. 2. Ionic Conductivity: In ionic crystals, electrical conduction occurs via the movement of ions. Ions can migrate through the lattice by hopping from one lattice site to a neighboring vacant site. Without these vacancies, the ions would be locked in place, and the crystal would be a near-perfect insulator. Plastic deformation is primarily caused by the movement of dislocations (line defects), and transparency is an optical property related to the electronic band gap, not point defects. Thus, vacancies specifically facilitate diffusion and ionic conductivity.

Electrochemical breakdown (often associated with chemical degradation or corrosion-induced failure in dielectrics) occurs when the material is exposed to environmental conditions that accelerate chemical reactions. In the context of surrounding air, high humidity provides the necessary moisture (water vapor) to act as an electrolyte or a reactant, while high temperature provides the thermal energy required to increase the rate of these chemical reactions (following the Arrhenius equation). Together, high temperature and high humidity facilitate the migration of ions and the formation of conductive paths (such as dendritic growth or oxidation), leading to the breakdown of the dielectric strength of the material. Low temperature or low humidity would inhibit these chemical processes, making them less likely to cause breakdown.

A Bipolar Junction Transistor (BJT) consists of two PN junctions: the Base-Emitter (BE) junction and the Base-Collector (BC) junction. The operating region of the transistor is determined by the biasing of these two junctions: 1. **Cut-off Region**: Both the BE junction and the BC junction are reverse biased. The transistor acts as an open switch, and virtually no current flows. 2. **Active Region**: The BE junction is forward biased and the BC junction is reverse biased. This is the standard mode for linear amplification. 3. **Saturation Region**: Both the BE junction and the BC junction are forward biased. In this state, the transistor acts as a closed switch, and the collector current reaches its maximum value (saturation), regardless of further increases in base current. 4. **Reverse-Active Region**: The BE junction is reverse biased and the BC junction is forward biased (this is rarely used as it is highly inefficient). Comparing these to the options: - Option (a) describes the Cut-off region. - Option (b) describes the Reverse-Active region. - Option (c) describes the Active region. - Option (d) correctly describes the Saturation region.

In an n-channel JFET, pinch-off occurs when the depletion regions meet, effectively restricting the current flow. The pinch-off voltage (Vp) is defined as the value of VDS at which pinch-off occurs when VGS = 0. However, when a gate-to-source voltage (VGS) is applied, the voltage required at the drain to reach pinch-off changes. The condition for pinch-off is given by the relationship: VDS(pinch-off) = Vp + VGS. Given that the pinch-off voltage (Vp) is 4 V and the drain-to-source voltage at which pinch-off occurs (VDS) is 1 V, we substitute these values into the formula: 1 V = 4 V + VGS. Solving for VGS: VGS = 1 V - 4 V = -3 V. In the context of JFETs, VGS for an n-channel device is typically negative to narrow the channel. The magnitude of the required voltage is 3 V. Therefore, the pinch-off occurs for VGS = -3 V (represented as 3 V in the options).

A two-port network is said to be reciprocal if the ratio of the response at one port to the excitation at the other port remains the same when the positions of the excitation and response are interchanged. In terms of network parameters, the conditions for reciprocity are as follows: 1. Z-parameters: A network is reciprocal if Z12 = Z21. 2. Y-parameters: A network is reciprocal if Y12 = Y21. This is because the admittance matrix relates currents to voltages, and for a reciprocal network, the transfer admittance from port 1 to 2 must equal the transfer admittance from port 2 to 1. 3. ABCD-parameters: A network is reciprocal if AD - BC = 1 (or BC - AD = -1). 4. h-parameters: A network is reciprocal if h12 = -h21. Evaluating the options: - Option (a) Z11 = Z22: This is the condition for symmetry, not reciprocity. - Option (b) Y12 = Y21: This is the correct condition for reciprocity. - Option (c) BC - AD = -1: While this is mathematically equivalent to AD - BC = 1, the standard definition for reciprocity in ABCD parameters is AD - BC = 1. However, in many contexts, this is considered correct. But comparing it to the fundamental Y-parameter definition, Y12 = Y21 is the most direct and standard representation of reciprocity among the choices provided. - Option (d) h12 = h21: The condition for reciprocity in h-parameters is h12 = -h21, not h12 = h21.

In a Bipolar Junction Transistor (BJT), the collector-base junction is reverse-biased during normal operation. For 'high-speed' transistors, the device is designed with very high doping concentrations in the base and collector regions to reduce transit time and decrease the width of the depletion region. When the doping concentration is sufficiently high, the depletion region becomes extremely narrow. In such cases, the electric field across the junction becomes intense enough to pull electrons directly from the valence band to the conduction band (field emission), which is the characteristic of Zener breakdown. This occurs at lower voltages than the impact ionization required for Avalanche breakdown. Since the collector-base junction is the one subjected to high reverse bias in these applications, the breakdown is attributed to the Zener mechanism at the base-collector junction.

Kirchhoff's laws are based on fundamental physical principles of conservation: Kirchhoff's Current Law (KCL) is based on the conservation of charge, and Kirchhoff's Voltage Law (KVL) is based on the conservation of energy. These laws describe the behavior of currents and voltages at nodes and around loops in a lumped-element circuit. Because they are derived from conservation laws, they do not depend on the nature of the components (whether they are linear resistors or non-linear diodes/transistors) or whether the components are time-invariant. As long as the circuit can be treated as a 'lumped' system (where the physical dimensions are much smaller than the wavelength of the signals), KCL and KVL remain valid for both linear and non-linear circuits. Therefore, option (d) is correct, while options (a), (b), and (c) are too restrictive.

To find the final value of a signal given its Laplace transform Y(s), we typically use the Final Value Theorem (FVT). The Final Value Theorem states that: lim_{t→∞} y(t) = lim_{s→0} sY(s), provided that all poles of sY(s) lie in the left half of the s-plane (LHP). 1. Given Y(s) = 1 / (s(s - 1)). 2. Let's examine the poles of Y(s). The poles are the values of s for which the denominator is zero: s = 0 and s = 1. 3. For the Final Value Theorem to be applicable, the system must be stable, meaning all poles of sY(s) must have negative real parts. 4. Let's find sY(s): sY(s) = s * [1 / (s(s - 1))] = 1 / (s - 1). 5. The pole of sY(s) is at s = 1. Since this pole is in the Right Half Plane (RHP), the system is unstable. 6. When a system has a pole in the RHP, the time-domain signal y(t) grows exponentially. 7. To verify, we can find the inverse Laplace transform of Y(s) using partial fraction expansion: Y(s) = 1 / (s(s - 1)) = -1/s + 1/(s - 1). Taking the inverse Laplace transform: y(t) = -1 + e^{t} for t ≥ 0. 8. As t approaches infinity, y(t) = lim_{t→∞} (-1 + e^{t}) = infinity. Therefore, the final value is infinity. Options a, b, and c are incorrect because they assume the FVT can be blindly applied without checking stability, or they represent finite values which do not match the exponential growth of the signal.

A decrease in the output resistance is the best answer because it directly satisfies the fact, principle, or condition asked in the question.

The Superposition Theorem states that in any linear bilateral network containing multiple independent sources, the current through (or voltage across) any element is the algebraic sum of the currents (or voltages) produced by each source acting alone, while all other independent sources are replaced by their internal impedances. 1. **Linearity Requirement**: The fundamental prerequisite for the superposition theorem is that the network must be linear. A linear network is one where the parameters (Resistance, Inductance, Capacitance) do not change with the change in voltage or current. 2. **Nature of Excitation**: Linearity is a property of the network components, not the source. Whether the excitation is a constant Direct Current (DC), a sinusoidal Alternating Current (AC), or a combination of both, the principle of linearity (additivity and homogeneity) remains valid. 3. **Application**: If a circuit has both DC and AC sources, the total response is the sum of the DC response (calculated by treating capacitors as open circuits and inductors as short circuits) and the AC response (calculated using phasors/impedances). Therefore, the theorem holds regardless of whether the excitation is AC, DC, or a mix of both.

This question relates to the physics of electrical resistivity in alloys. Silver (Ag) is the most conductive element (lowest resistivity), and Copper (Cu) is the second most conductive element. When a solute (like copper) is added to a solvent (like silver) to form a solid solution alloy, the resistivity of the resulting alloy increases significantly compared to both pure components. This is due to 'impurity scattering' or 'alloy scattering.' In a pure metal, electrons move through a periodic lattice with minimal scattering. Adding atoms of a different element (even if that element is also a good conductor) disrupts the periodicity of the crystal lattice. These lattice distortions act as scattering centers for conduction electrons, increasing the mean free path's resistance. Therefore, the resistivity of a silver-copper alloy is higher than that of pure silver and also higher than that of pure copper, regardless of the fact that both constituents are highly conductive. This is a general rule in material science: alloying typically increases the electrical resistivity of a metal.

The resistance (R) of a wire is given by the formula: R = ρ(L/A), where ρ is the resistivity of the material, L is the length, and A is the cross-sectional area. Given for wire B: Resistance R_B = 1 Ω (Note: The 'W' in the prompt is a typographical error for Ω/Ohms). Let the length of B be L_B and the cross-sectional area be A_B. So, R_B = ρ(L_B / A_B) = 1 Ω. Given for wire A: 1. Length L_A = 20 * L_B 2. Cross-sectional area A_A = (1/2) * A_B Now, calculate the resistance of wire A (R_A): R_A = ρ(L_A / A_A) Substitute the values of L_A and A_A in terms of B: R_A = ρ [ (20 * L_B) / (0.5 * A_B) ] R_A = (20 / 0.5) * ρ(L_B / A_B) R_A = 40 * R_B Since R_B = 1 Ω: R_A = 40 * 1 = 40 Ω. Therefore, the resistance of wire A is 40 Ω. Option (a) is correct.

A function x(t) is said to be conjugate symmetric if it satisfies the condition x(t) = x*(-t), where * denotes the complex conjugate. According to the properties of the Fourier Transform, if a signal x(t) is conjugate symmetric, its Fourier Transform X(ω) is purely real. Mathematical Proof: 1. The Fourier Transform is defined as X(ω) = ∫ x(t) e^(-jωt) dt. 2. If x(t) = x*(-t), then X(ω) = ∫ x*(-t) e^(-jωt) dt. 3. Let u = -t, then dt = -du. The limits change from (-∞, ∞) to (∞, -∞). 4. X(ω) = ∫ x*(u) e^(jωu) du. 5. Notice that the expression ∫ x*(u) e^(jωu) du is exactly the complex conjugate of the Fourier Transform formula: X*(ω) = ∫ x*(t) e^(jωt) dt. 6. Therefore, X(ω) = X*(ω). 7. Any complex number that is equal to its own conjugate must be purely real. Analysis of options: - (a) Imaginary: This occurs if the function is conjugate antisymmetric (x(t) = -x*(-t)). - (b) Conjugate antisymmetric: This is a property of the signal, not the result of the transform in this context. - (c) Real: Correct, as proven above. - (d) Conjugate symmetric: This is the property of the input signal, not necessarily the resulting transform.

1. Definition of Transient Response: The transient response is the part of the response of a system that decays to zero as time increases. It occurs when a circuit undergoes a change in its state (e.g., switching a switch on or off), causing the system to transition from one steady-state condition to another. 2. Role of Energy Storage Elements: Transient responses are caused by the ability of certain components to store energy. - Capacitors store energy in an electric field (voltage cannot change instantaneously). - Inductors store energy in a magnetic field (current cannot change instantaneously). 3. Analysis of Options: - Option (a): Resistive circuits do not store energy; they dissipate it. In a purely resistive circuit, the response to a change in input is instantaneous, meaning there is no transient period. - Option (b) and (c): While transients occur in purely capacitive or purely inductive circuits, they are not limited to 'only' one of them. - Option (d): Since both capacitors and inductors are energy-storage elements, both are capable of producing transient responses when the circuit configuration or source changes. Therefore, the transient response occurs in circuits containing either capacitors, inductors, or both.