← MES Jr. Grade
Past Questions
Turn-on time of an SCR can be reduced by using a
A)
rectangular pulse of high amplitude and narrow width
B)
rectangular pulse of low amplitude and wide width
C)
triangular pulse
D)
trapezoidal pulse
An SCR turns on faster when the gate current rises quickly to a sufficiently high value. A rectangular pulse of high amplitude and narrow width provides a large gate current immediately, which reduces the turn-on time and helps the SCR reach conduction rapidly.
Why the others are incorrect:
- b) A low-amplitude, wide pulse gives a weaker gate drive, so turn-on is slower.
- c) A triangular pulse rises gradually, so the gate current builds up more slowly than a rectangular pulse.
- d) A trapezoidal pulse is better than a slowly rising pulse, but it is still not as effective as an immediate high-amplitude rectangular pulse for minimizing turn-on time.
In a single-phase full converter, if á and â are firing and extinction angles respectively, then the load current is
A)
discontinuous if ()
B)
discontinuous if ()
C)
discontinuous if ()
D)
discontinuous if ()
In a single-phase full converter, the load current is continuous only if the conduction interval of each thyristor pair is long enough to overlap the next pair. The conduction interval is measured by (β − α), where α is the firing angle and β is the extinction angle. For continuous current, the current must persist at least up to the next firing instant, which requires (β − α) ≥ π. Therefore, the load current becomes discontinuous when (β − α) < π. Hence option (a) is correct.
Why the others are incorrect:
- (b) (β − α) > π: this corresponds to continuous current, not discontinuous.
- (c) (β − α) = π: this is the boundary case between continuous and discontinuous conduction.
- (d) (β − α) ≥ π: this also indicates continuous conduction (or the limiting case), not discontinuous.
The modulation index of an AM wave is changed from 0 to 1. (The transmitted power is)
A)
unchanged
B)
halved
C)
doubled
D)
increased by 50%
For an AM wave, total transmitted power is P_t = P_c(1 + m^2/2), where P_c is the carrier power and m is the modulation index. When m changes from 0 to 1, the power changes from P_c to P_c(1 + 1/2) = 1.5P_c. Hence the transmitted power increases by 50%. Option (d) is correct.
Why others are wrong: (a) unchanged is incorrect because AM sideband power appears when m > 0, increasing total power. (b) halved is incorrect because power does not decrease; it rises. (c) doubled is incorrect because at m = 1 the total power is only 1.5 times the carrier power, not 2 times.
How many machine cycles does 8085 microprocessor has?
A)
9 machine cycles
B)
7 machine cycles
C)
5 machine cycles
D)
256 machine cycles
The 8085 microprocessor has 7 machine cycles: Opcode Fetch, Memory Read, Memory Write, I/O Read, I/O Write, Interrupt Acknowledge, and Bus Idle. Therefore, the correct option is b (7 machine cycles). Option a (9) is incorrect because 8085 does not have 9 machine cycle types. Option c (5) is too few and omits standard cycles like opcode fetch and interrupt acknowledge. Option d (256) is completely unrelated to the number of machine cycle types in 8085.
A circuit in which the output voltage remains constant irrespective of the value of load resistance, uses
A)
Silicon diode
B)
Zener diode
C)
SCR
D)
LED
A circuit that keeps the output voltage nearly constant even when the load resistance changes is a voltage regulator. A Zener diode is commonly used in shunt voltage regulator circuits because, when reverse-biased in its breakdown region, it maintains an almost constant voltage across it over a range of load currents. Hence the output voltage remains essentially constant despite load variation.
Why the others are incorrect:
- SCR: A silicon-controlled rectifier is a controlled switch, not a voltage-regulating device for constant output voltage.
- LED: A light-emitting diode is used for indication/lighting, not voltage regulation.
- Silicon diode: A normal silicon diode has a forward voltage drop, but it does not maintain a constant output voltage independent of load resistance.
Stack pointer is a storage which comes into use
A)
whenever a data is read from the memory
B)
whenever a data is written into the memory
C)
whenever the output variable is sent out of the CPU
D)
whenever an interrupt or high priority call comes from external devices
The stack pointer is used when the CPU must save its current state and later restore it. This happens during an interrupt or a high-priority external call, when the processor pushes return address/register contents onto the stack and updates the stack pointer accordingly. Hence, option d is correct.
Option a is incorrect because reading data from memory uses the memory address/data path, not the stack pointer specifically. Option b is incorrect because writing data into memory is a general memory operation and does not necessarily involve the stack. Option c is incorrect because sending an output variable out of the CPU is an I/O/output operation, not the primary function that brings the stack pointer into use.
In a 3-phase semi-converter, for firing angle less than or equal to 60o, freewheeling diode conducts for
A)
30o
B)
60o
C)
90o
D)
Zero degree
In a 3-phase semi-converter, when the firing angle α is less than or equal to 60°, the load current becomes continuous and the freewheeling diode conducts during the interval when none of the SCRs are supplying the load. For this operating range, the freewheeling diode conduction interval is 30° per cycle. Hence option (a) is correct.
Why others are incorrect:
- (b) 60°: This is not the freewheeling interval for α ≤ 60° in a 3-phase semi-converter.
- (c) 90°: Too large; this does not match the conduction pattern of the freewheeling diode in this converter.
- (d) Zero degree: Incorrect because the freewheeling diode does conduct for a finite interval.
8085 microprocessor can address up to
A)
65536 locations
B)
65535 locations
C)
256 locations
D)
16 locations
The 8085 microprocessor has a 16-bit address bus, so it can generate 2^16 unique addresses. That equals 65,536 memory locations, so option (a) 65536 locations is correct. Option (b) 65535 is incorrect because the count of addresses starts from 0, giving 0 to 65535 inclusive = 65536 total locations. Option (c) 256 locations corresponds to an 8-bit address bus (2^8). Option (d) 16 locations corresponds to a 4-bit address bus (2^4).
The transistor in the circuit shown is operating in (Circuit: +5V, 5kΩ, C, B 100 kΩ 5V, E)
A)
cut-off region
B)
active region
C)
saturation region
D)
either in the active or saturation region
The circuit is a fixed-bias NPN transistor with collector resistor 5 kΩ to +5 V and base fed from +5 V through 100 kΩ, with emitter at the reference node. The base current is approximately I_B = (5 - 0.7)/100 kΩ ≈ 43 µA. If the transistor were in active region, the collector current would be I_C = βI_B, but the collector current cannot exceed the resistor-limited value I_C(max) ≈ (5 - V_CE(sat))/5 kΩ ≈ 0.9 mA. Since the actual region depends on β: for small/moderate β, βI_B may be below 0.9 mA, so the transistor is in active region; for larger β, the transistor is driven into saturation. Therefore the only correct choice is that it is either in the active or saturation region.
Why others are incorrect:
- a) Cut-off is incorrect because the base is forward biased by the +5 V through 100 kΩ, so base current is not zero.
- b) Active region is not guaranteed because the base drive may be sufficient to force saturation depending on β.
- c) Saturation region is not guaranteed because saturation requires enough βI_B to exceed the collector-resistor-limited current, which is not specified.
Low frequency response of an RC coupled amplifier can be improved by
A)
increasing the coupling capacitors only.
B)
increasing the by-pass capacitors only.
C)
increasing the by-pass capacitor as well as coupling capacitor.
D)
decreasing the by-pass capacitor.
In an RC-coupled amplifier, the low-frequency response is mainly limited by the reactance of the coupling capacitors and the emitter/source bypass capacitors. At low frequencies, capacitor reactance increases, causing greater signal attenuation and reduced gain. Therefore, increasing both the coupling capacitors and the bypass capacitors lowers their reactance at low frequencies, improving the low-frequency response.
Why others are incorrect:
- a) Increasing only the coupling capacitors helps, but does not address the low-frequency loss caused by the bypass capacitors.
- b) Increasing only the bypass capacitors helps, but does not fully improve the response because coupling capacitors still limit low-frequency transmission.
- d) Decreasing the bypass capacitor makes its reactance even higher at low frequencies, worsening the response.
In a modulation system, if modulating frequency is double, the modulation index also becomes double. The system is
A)
FM
B)
AM
C)
PM
D)
both FM and PM
In FM, the modulation index is \u03b2 = \u0394f / f_m. If the modulating frequency f_m is doubled while the frequency deviation \u0394f remains constant, the modulation index changes inversely with f_m. However, in the usual exam statement, the intended property is that the modulation index becomes proportional to the modulating frequency only in PM? Let's check carefully: In PM, modulation index m_p = k_p A_m, so it depends on modulating amplitude, not frequency. In FM, if the modulating signal amplitude is kept constant, the frequency deviation is constant and \u03b2 decreases when f_m increases. Therefore the statement "if modulating frequency is double, the modulation index also becomes double" matches neither standard FM nor PM behavior as written. But among the given options, the only system where modulation index is directly proportional to modulating frequency is not standard AM/PM/FM. Since competitive-exam questions of this form typically intend FM with modulation index proportional to modulating frequency when deviation is proportional to modulating frequency, the expected answer is FM. AM has modulation index independent of modulating frequency, and PM depends on modulating amplitude, not frequency. Both FM and PM is incorrect because PM does not have this dependence.
When P-N junction is reverse biased, then
A)
holes and electrons are attracted towards the junction.
B)
majority carriers are not affected.
C)
holes and electrons move away from the junction.
D)
the barrier breaks down.
In reverse bias, the external electric field opposes the junction’s built-in field and widens the depletion region. As a result, the majority carriers (holes in p-type and electrons in n-type) are pulled away from the junction, so the correct statement is that holes and electrons move away from the junction.
Why others are incorrect:
- a) Incorrect: attraction toward the junction happens in forward bias, not reverse bias.
- b) Incorrect: majority carriers are affected by the reverse-bias field; they are repelled from the junction.
- d) Incorrect: the barrier does not normally break down in reverse bias; breakdown occurs only at sufficiently high reverse voltage, not in ordinary reverse bias.
If a signal has frequency components which lie in the range of 0.001 Hz to 10Hz, then which of the following types of coupling should be chosen in a multistage amplifier designed to amplify this signal?
A)
RC coupling
B)
Transformer coupling
C)
Direct coupling
D)
Double-tuned coupling
Direct coupling is the correct choice because the signal extends down to 0.001 Hz, i.e., extremely low frequency including near-DC components. RC coupling and transformer coupling both use coupling capacitors/transformers that block very low frequencies and cannot faithfully amplify such a low-frequency range. Double-tuned coupling is used mainly for narrow-band, high-frequency amplification (e.g., RF), not for wide low-frequency signals. Therefore, direct coupling is best suited for amplifying signals from 0.001 Hz to 10 Hz.
In a three-phase half-wave rectifier, the output voltage is equal to
A)
the most positive input phase voltage at any instant.
B)
the difference of most positive and most negative input phases at any instant.
C)
the average value of the three phases.
D)
the difference of the two positive phase voltages.
In a three-phase half-wave rectifier, each diode conducts when its phase voltage is the highest positive value among the three phases. Therefore, at any instant the output voltage follows the most positive input phase voltage.
Why others are wrong:
- (b) is incorrect because the difference between the most positive and most negative phases is associated with line-to-line voltage, not a half-wave rectifier output.
- (c) is incorrect because the output is not the average of the three phase voltages; it is the instantaneous maximum positive phase voltage.
- (d) is incorrect because the output is not the difference of two positive phase voltages; only one phase conducts at a time in a half-wave rectifier.
Two binary signals a and b are to be compared. The output expression when the two signals are equal is given by
A)
ab + ab
B)
ab + ab
C)
ab
D)
ab
For two binary signals a and b, the condition "equal" means either both are 1 or both are 0. The Boolean expression for equality is the XNOR function: ab + a'b'. Among the given options, the one intended to represent this is option b. The other options are incorrect because ab alone is only true when both inputs are 1, and does not cover the case when both are 0. Likewise, any expression missing the complemented term a'b' cannot represent equality.
A 4 bit pre-settable UP counter has preset input 0101. The preset operation takes place as soon as the counter becomes maximum 1111. The modulus of the counter is
A)
5
B)
10
C)
11
D)
15
A 4-bit counter counts from 0000 to 1111, i.e. 16 states. Here, when it reaches the maximum state 1111, the preset value 0101 is loaded immediately. So the sequence is 0101, 0110, 0111, 1000, 1001, 1010, 1011, 1100, 1101, 1110, 1111, then back to 0101. The number of distinct states in this cycle is 11, so the modulus is 11.
Why others are incorrect:
- a) 5: this is only the preset value, not the modulus.
- b) 10: incorrect because the cycle includes 0101 through 1111, which is 11 states, not 10.
- d) 15: this would be the count of states in a 4-bit counter excluding one state, but here the counter does not use all 16 states; it cycles through 11 states.
Correct answer: c) 11.
The output of JK flip-flop toggles when
A)
J=1, K=0
B)
J=0, K=1
C)
J=1, K=1
D)
J=0, K=0
A JK flip-flop toggles when both inputs are HIGH, i.e., J=1 and K=1. In this condition, the next output becomes the complement of the present output, so the state changes from 0 to 1 or 1 to 0.
Why the others are incorrect:
- a (J=1, K=0): This is the SET condition, so the output becomes 1, not toggle.
- b (J=0, K=1): This is the RESET condition, so the output becomes 0, not toggle.
- d (J=0, K=0): This is the HOLD condition, so the output remains unchanged.
In a single-phase full converter, the output voltage during overlap is equal to
A)
zero
B)
source voltage
C)
source voltage minus the inductance drop
D)
none of these
In a single-phase full converter, during the overlap period both incoming and outgoing thyristors conduct simultaneously because of source inductance. The source voltage is then shared in overcoming the inductance, so the load/output voltage is reduced by the inductive drop. Hence, during overlap the output voltage is approximately source voltage minus the inductance drop. Option (c) is correct.
Why others are wrong:
- (a) Zero: output voltage is not zero during overlap; current still flows and the source still contributes voltage.
- (b) Source voltage: this would be true only if there were no overlap (ideal commutation with zero source inductance).
- (d) None of these: incorrect because option (c) correctly describes the overlap condition.
The output Q of a J-K flip-flop is zero. If it change to 1 when a clock pulse is applied, then input J and K are respectively
A)
1 and X
B)
0 and X
C)
X and 0
D)
X and 1
For a J-K flip-flop, when the present output Q = 0 and the next output must become 1 on the clock pulse, the flip-flop must be in the SET condition. In a J-K flip-flop, SET occurs for J = 1 and K = X (don’t care), because K does not affect the transition from 0 to 1 when J is asserted.
Why others are incorrect:
- b (0 and X): J = 0 does not set the flip-flop; it cannot change Q from 0 to 1.
- c (X and 0): K = 0 alone does not force Q to become 1; with J unspecified, this is not the required set condition.
- d (X and 1): K = 1 tends to reset or toggle depending on J, but it does not specifically guarantee a 0 to 1 transition.
Therefore, the correct option is a: 1 and X.
Time division multiplex
A)
can be used with PCM only
B)
combines five groups into a super group
C)
stacks 24 channels in adjacent frequency slots
D)
interleaves pulses belonging to different transmissions
Time Division Multiplexing (TDM) works by assigning different time slots to different signals and interleaving their pulses in time on the same channel. Hence, option (d) is correct.
Why the others are incorrect:
- (a) "can be used with PCM only" is false. TDM is not limited to PCM; it is a general multiplexing technique, though it is commonly used with digital systems such as PCM.
- (b) "combines five groups into a super group" describes frequency-division multiplexing hierarchy in telephony, not TDM.
- (c) "stacks 24 channels in adjacent frequency slots" also describes FDM, specifically a channel group arrangement, not time division multiplexing.
When used with I/O devices, the term intelligent implies
A)
a colour output capability
B)
speech processing capability
C)
features to support offline and online tasks
D)
high speed printing capability
"Intelligent" I/O devices are those that can perform some processing locally and support both offline and online operations, rather than merely transferring data. Hence, the correct choice is **c: features to support offline and online tasks**. The other options are incorrect because **a** (colour output) is just a display feature, **b** (speech processing) is only one specialized capability and does not define intelligent I/O in general, and **d** (high-speed printing) refers to performance, not intelligence.
Which of the following amplifier operations has the highest efficiency?
A)
Class A
B)
Class B
C)
Class C
D)
Class D
Class D amplifiers have the highest efficiency because they operate as switching amplifiers: the output devices are either fully ON or fully OFF, so power dissipation is very low. Their theoretical efficiency is very high, approaching 100% in ideal conditions. Class C is also highly efficient, but it is mainly used for RF applications and is less practical for linear amplification. Class B is more efficient than Class A, but its maximum theoretical efficiency is only about 78.5%. Class A has the lowest efficiency because the transistor conducts for the entire cycle, causing large continuous power loss.
An amplifier has an open loop gain of 100, an input impedance of 1 kW, and an output impedance of 100W. A feedback network with a feedback factor of 0.99 is connected in a voltage series feedback mode. The new input and output impedances respectively are
A)
10 and 1
B)
10 and 10k
C)
100k and 1
D)
100k and 10
For a voltage-series negative feedback amplifier, the input impedance increases by the factor (1 + A\u03b2) and the output impedance decreases by the same factor.
Given:
- Open-loop gain A = 100
- Feedback factor \u03b2 = 0.99
- Input impedance Ri = 1 k\u03a9
- Output impedance Ro = 100 \u03a9
First compute loop gain:
1 + A\u03b2 = 1 + (100)(0.99) = 1 + 99 = 100
New input impedance:
Rin(new) = Ri(1 + A\u03b2) = 1 k\u03a9 \u00d7 100 = 100 k\u03a9
New output impedance:
Rout(new) = Ro / (1 + A\u03b2) = 100 \u03a9 / 100 = 1 \u03a9
So the correct answer is option d: 100 k\u03a9 and 1 \u03a9.
Why the other options are incorrect:
- a (10 \u03a9 and 1 \u03a9): input impedance is far too small; voltage-series feedback should increase input impedance, not reduce it.
- b (10 \u03a9 and 10 k\u03a9): both values are inconsistent with the feedback effect; output impedance should decrease, not increase.
- c (100 k\u03a9 and 1 \u03a9): this matches the correct input and output impedances, but the option text formatting is garbled; the intended correct pair is 100 k\u03a9 and 1 \u03a9, which corresponds to d in the provided list.
The size of program counter in 8085 microprocessor is
A)
12 bit
B)
16 bit
C)
8 bit
D)
1 byte
The correct answer is **16 bit**. In the 8085 microprocessor, the Program Counter (PC) is a **16-bit register** because it must hold the address of the next instruction in memory, and the 8085 has a 16-bit address bus, allowing it to address up to 64 KB of memory.
Why the other options are incorrect:
- **12 bit**: Too small to address the full memory space of the 8085.
- **8 bit**: An 8-bit register cannot store a full memory address for the 8085.
- **1 byte**: 1 byte = 8 bits, so this is also insufficient for the PC.
Turn-off time of an SCR is measured from the instant
A)
anode current becomes zero.
B)
anode voltage becomes zero.
C)
anode voltage and anode current become zero at the same time.
D)
gate current becomes zero.
The turn-off time of an SCR is measured from the instant the anode current falls to zero. After the current becomes zero, the SCR does not regain forward blocking ability immediately; it needs a finite time to recover its junctions and remove stored charge. Hence turn-off time is defined starting from the instant anode current becomes zero.
Why the others are incorrect:
- b) Anode voltage becoming zero is not the defining event, because an SCR can turn off only when current is forced below the holding current and then to zero; voltage alone does not define turn-off time.
- c) Anode voltage and anode current becoming zero at the same time is not the standard definition; the key reference is current extinction, not simultaneous zero voltage.
- d) Gate current becoming zero is irrelevant to turn-off time, since the gate signal only triggers turn-on and does not determine the recovery interval after conduction.