← MES Jr. Grade
Past Questions — 2024
In a zener regulator, the change in load current produces, change in
A)
Zener voltage
B)
Zener current
C)
Both (a) & (b)
D)
None of these
In a Zener voltage regulator circuit, the Zener diode is connected in parallel with the load resistor. The total current flowing from the source through the series resistor (Rs) is given by I_total = (V_in - V_z) / Rs. According to Kirchhoff's Current Law (KCL), this total current splits into two paths: the Zener current (Iz) and the load current (Il). Therefore, I_total = Iz + Il. Since the input voltage (Vin) and the series resistance (Rs) are typically constant, the total current (I_total) remains constant. Consequently, any change in the load current (ΔIl) must be compensated for by an equal and opposite change in the Zener current (ΔIz) to keep the sum constant (ΔIz = -ΔIl). The primary purpose of the Zener regulator is to keep the Zener voltage (Vz) constant despite changes in load current or input voltage, provided the Zener diode remains in its breakdown region. Thus, the change in load current produces a change in the Zener current, not the Zener voltage.
The binary number 110011 is to be converted to gray code. The number of gates and type required are
A)
6, AND
B)
6, XNOR
C)
6, XOR
D)
5, XOR
To convert a binary number to Gray code, the following algorithm is used:
1. The Most Significant Bit (MSB) of the Gray code is the same as the MSB of the binary number.
2. Each subsequent bit of the Gray code is obtained by performing an XOR operation between the current binary bit and the previous binary bit.
For a binary number with 'n' bits, the conversion process is:
- G[n-1] = B[n-1] (No gate required)
- G[n-2] = B[n-1] ⊕ B[n-2] (1st XOR gate)
- G[n-3] = B[n-2] ⊕ B[n-3] (2nd XOR gate)
- ...
- G[0] = B[1] ⊕ B[0] ((n-1)th XOR gate)
In this specific question, the binary number is 110011, which consists of n = 6 bits.
Therefore, the number of XOR gates required is (n - 1) = 6 - 1 = 5 gates.
Calculation for 110011:
- MSB: 1 (remains 1)
- 2nd bit: 1 ⊕ 1 = 0
- 3rd bit: 1 ⊕ 0 = 1
- 4th bit: 0 ⊕ 0 = 0
- 5th bit: 0 ⊕ 1 = 1
- 6th bit: 1 ⊕ 1 = 0
Gray code = 101010. This process required exactly 5 XOR operations.
The effective channel length of a MOSFET in saturation decreases with
A)
gate voltage
B)
drain voltage
C)
source voltage
D)
body voltage
This question refers to the phenomenon known as Channel Length Modulation (CLM) in MOSFETs. When a MOSFET operates in the saturation region, the pinch-off point occurs where the channel ends. As the drain-to-source voltage (Vds) increases beyond the saturation voltage (Vdsat), the pinch-off point moves slightly toward the source. This effectively reduces the length of the inverted channel (the distance over which the carriers flow before entering the depletion region near the drain). The effective channel length (Leff) is expressed as Leff = L - ΔL, where ΔL is the length of the depletion region at the drain end. Since ΔL increases as the drain voltage increases, the effective channel length decreases. This effect leads to a non-zero slope in the I-d vs V-ds curve in the saturation region, meaning the output resistance is finite rather than infinite. Gate voltage primarily affects the channel depth/width (inversion layer), and source/body voltages affect the threshold voltage (body effect), but the specific reduction of the effective length in saturation is driven by the drain voltage.
The program counter in a 8085 microprocessor is a 16-bit register, because
A)
Small systems
B)
Large systems
C)
Both large and small systems
D)
Very large systems
The 8085 has a 16-bit program counter because it must hold the address of the next instruction in memory, and the 8085 can address up to 64 KB of memory. A 16-bit register is required to represent all possible memory addresses in such a system. Hence, the correct option is 'Large systems'.
Why others are incorrect:
- a) Small systems: small systems do not require a 16-bit PC specifically; the 16-bit size is chosen to support a larger address space.
- c) Both large and small systems: this is too general and does not explain the need for 16-bit width.
- d) Very large systems: 8085 is an 8-bit microprocessor with a 16-bit address space, suitable for relatively large but not very large systems.
For which of the following devices, is DMA the most suitable?
A)
Keyboard
B)
Mouse
C)
Joy stick
D)
Hard disk
Direct Memory Access (DMA) is a feature of computer systems that allows certain hardware subsystems to access main system memory (RAM) independently of the central processing unit (CPU). This is most suitable for devices that transfer large blocks of data at high speeds, as it prevents the CPU from becoming a bottleneck by handling every single byte of the transfer.
1. **Hard disk (Option d):** Hard disks transfer massive amounts of data (files, OS images) to and from the RAM. Using DMA allows the disk controller to move these large blocks of data directly to memory while the CPU performs other tasks, making it the most suitable candidate.
2. **Keyboard, Mouse, and Joystick (Options a, b, c):** These are low-speed input devices. They generate very small amounts of data (usually a few bytes per event) and occur sporadically. These devices typically use **Interrupt-driven I/O** or **Polling**. Using DMA for a keyboard would be inefficient because the overhead of setting up the DMA controller would exceed the time taken to simply let the CPU read the single character pressed.
The output Q of a J-K flip-flop is zero. If change to 1 when a clock pulse is applied. The output J and K are respectively
A)
1 and X
B)
0 and X
C)
X and 0
D)
X and 1
To solve this, we analyze the state transition of a J-K flip-flop.
1. **Initial State**: The current output $Q(t) = 0$.
2. **Final State**: The next output $Q(t+1) = 1$ after a clock pulse.
3. **Analysis of J-K Truth Table**:
- If $J=0, K=0$: The state remains unchanged (Hold). Since $Q$ was 0, it would stay 0. (Incorrect)
- If $J=0, K=1$: The state is forced to 0 (Reset). Since $Q$ was 0, it stays 0. (Incorrect)
- If $J=1, K=0$: The state is forced to 1 (Set). $Q$ changes from 0 to 1. (Correct)
- If $J=1, K=1$: The state toggles. Since $Q$ was 0, it changes to 1. (Correct)
4. **Evaluating Options**:
- We need $J=1$ for the output to become 1 regardless of whether $K$ is 0 or 1.
- In the options provided, 'X' represents a 'Don't Care' condition (meaning it can be either 0 or 1).
- Option (a) '1 and X' means $J=1$ and $K$ can be anything. As shown above, if $J=1$, the output $Q$ will become 1 whether $K=0$ (Set) or $K=1$ (Toggle).
Therefore, the condition for $Q$ to change from 0 to 1 is that $J$ must be 1, while $K$ can be either 0 or 1.
In a class B amplifier, the output current flows for
A)
Less than half input
B)
More than half input
C)
Half input
D)
One complete cycle
In a Class B amplifier, the biasing point (Q-point) is set exactly at the cutoff point of the transistor's characteristic curve. Because the transistor is biased at cutoff, it only conducts when the input signal swings positive (for an NPN transistor), allowing current to flow for only one half-cycle of the input signal. Specifically, the conduction angle is 180 degrees. To achieve a full output waveform without distortion, Class B amplifiers are typically used in 'push-pull' configurations where two transistors work in tandem—one handling the positive half-cycle and the other handling the negative half-cycle. Therefore, a single transistor in a Class B amplifier conducts for exactly half of the input cycle.
Which of the following 3-phase AC to DC converter requires neutral point connection?
A)
3-phase semi-conduction
B)
3-phase full converter
C)
3-phase half-wave converter
D)
3-phase full converter with diodes
In a 3-phase half-wave converter (also known as a 3-pulse converter), only one thyristor or diode is conducted at a time. The current flows from the AC supply line through the switching device to the load, and then returns to the source. For the circuit to be complete, the return path must be connected to the neutral point of the 3-phase supply (star connection). Without a neutral connection, the current cannot return to the source, and the converter will not function.
In contrast, 3-phase full converters (6-pulse converters), whether they use thyristors or diodes, are bridge configurations. In these circuits, the current flows from one phase and returns through another phase (line-to-line conduction). Therefore, they do not require a neutral point connection to operate.
- Option (a) 'semi-conduction' is not a standard term for a specific converter topology in this context.
- Option (b) and (d) are full-bridge converters which are 3-wire systems and do not require a neutral.
The current gain of a bipolar transistor drops at high frequencies because of
A)
Transistor capacitance
B)
High current effects in the base
C)
Parasitic inductive elements
D)
The early effect
In a Bipolar Junction Transistor (BJT), the current gain decreases at high frequencies primarily due to internal junction capacitances. There are two main types of capacitance involved: 1) Junction Capacitances (Diffusion and Depletion capacitance) such as Cbe (base-emitter) and Cbc (base-collector). 2) The Miller Effect, which amplifies the effect of the collector-base capacitance in common-emitter configurations. At high frequencies, these capacitances provide low-impedance paths (shunts) for the signal, causing the signal to bypass the active region of the transistor and effectively reducing the current gain.
Why other options are incorrect:
- b. High current effects: These typically relate to saturation or thermal runaway, not frequency response.
- c. Parasitic inductive elements: While inductances exist in lead wires and packaging, they typically cause instability or oscillations at extremely high (microwave) frequencies, but the primary cause of the gain roll-off in standard BJT frequency response is capacitance.
- d. The Early effect: This refers to base-width modulation caused by the collector-base voltage, which affects the output resistance and DC gain, but it is not the cause of high-frequency gain drop.
Which of the following is an uncontrolled device?
A)
Power diode
B)
Power transistor
C)
Power MOSFET
D)
Power IGBT
In power electronics, devices are categorized based on their ability to control the initiation of conduction.
1. **Uncontrolled Devices**: These devices do not have a control terminal (like a gate). Their conduction depends solely on the polarity of the voltage applied across their terminals. A **Power Diode** is a two-terminal device that conducts when forward-biased and blocks when reverse-biased; there is no external signal to 'turn it on' or 'off' while it is forward-biased. Therefore, it is an uncontrolled device.
2. **Controlled/Switching Devices**: These devices have a third terminal (Gate) that allows the user to control when the device starts or stops conducting, regardless of the bias (within limits).
- **Power Transistor (BJT)**: Controlled by base current.
- **Power MOSFET**: Controlled by gate-to-source voltage.
- **Power IGBT**: Controlled by gate-to-emitter voltage.
Since options b, c, and d are all controllable switches, the only uncontrolled device listed is the Power Diode.
Determine the output frequency for a frequency division circuit that contains 12 flip-flops with an input clock frequency of 20.48 MHz.
A)
10.24kHz
B)
5kHz
C)
30.24kHz
D)
15kHz
A frequency division circuit with 12 flip-flops divides the input clock by 2^12 = 4096. So the output frequency is 20.48 MHz / 4096 = 0.005 MHz = 5 kHz. However, since the given options include 10.24 kHz, 15 kHz, 5 kHz, and 30.24 kHz, the correct match is 5 kHz (option b). The other options are incorrect because they do not equal the input frequency divided by 4096.
Negative feedback in amplifier
A)
Reduced gain
B)
Reduced bandwidth
C)
Increase phase distortion
D)
Increase noise
Negative feedback in an amplifier feeds a portion of the output back to the input in opposite phase. This reduces the overall closed-loop gain, so the correct option is **Reduced gain**. The other options are incorrect because negative feedback generally **reduces noise**, **increases bandwidth**, and **reduces distortion/phase distortion** rather than increasing them.
Number of valance electron in Germanium
A)
2
B)
5
C)
6
D)
4
Germanium (Ge) is a chemical element with atomic number 32. Its electronic configuration is [Ar] 3d¹⁰ 4s² 4p². The valence electrons are those located in the outermost shell (the 4th shell in this case). Adding the electrons in the 4s and 4p orbitals (2 + 2), we get a total of 4 valence electrons. Because it has 4 valence electrons, Germanium is classified as a Group 14 element and acts as a semiconductor, forming a crystalline lattice where each atom is covalently bonded to four neighboring atoms.
Analysis of options:
- Option (a) 2: Incorrect. This would be characteristic of Group 2 elements (e.g., Magnesium).
- Option (b) 5: Incorrect. This is characteristic of pentavalent impurities like Phosphorus or Arsenic used for n-type doping.
- Option (c) 6: Incorrect. This is characteristic of Group 16 elements (e.g., Oxygen, Sulfur).
- Option (d) 4: Correct. Germanium is a tetravalent element.
The simplified form of logic function Y = (A+B)(A+B) is
A)
A+B
B)
AB
C)
A+B
D)
AB+AB
The given logic function is Y = (A + B)(A + B).
Step 1: According to the Idempotent Law of Boolean Algebra, any variable or expression operated on by itself using AND or OR results in the original variable or expression.
Specifically, the Idempotent Law states: X · X = X.
Step 2: In this problem, let the expression (A + B) be represented by a single variable X.
Therefore, Y = X · X.
Step 3: Applying the Idempotent Law (X · X = X), we get Y = X.
Step 4: Substituting (A + B) back for X, we get Y = A + B.
Alternative Algebraic Expansion:
Y = (A + B)(A + B)
= A·A + A·B + B·A + B·B (Distributive Law)
= A + AB + AB + B (Since A·A = A and B·B = B)
= A(1 + B) + B(1 + A) (Factoring)
= A(1) + B(1) (Since 1 + X = 1)
= A + B.
Comparing this result with the options:
Option (a) A+B is correct.
Option (b) AB is incorrect as it represents an AND operation.
Option (c) A+B is identical to (a).
Option (d) AB+AB simplifies to AB, which is incorrect.
If gate current is increased, the anode-cathode voltage at which SCR closes is
A)
increased
B)
decreased
C)
maximum
D)
least
An SCR (Silicon Controlled Rectifier) is a four-layer PNPN device. To turn on (trigger) the SCR, it must reach its 'breakover voltage' (VBO). There are two primary ways to trigger an SCR: 1) By increasing the anode-to-cathode voltage until it reaches the forward breakover voltage, or 2) By applying a positive gate current (Ig) while the device is forward-biased.
When a gate current is injected into the gate terminal, it increases the charge carrier concentration in the P-layer (the gate-cathode junction). This reduces the depletion region width and lowers the barrier for current to flow from the anode to the cathode. Consequently, the amount of anode-to-cathode voltage required to trigger the device into conduction (the 'closing' or triggering voltage) decreases.
Mathematically, the relationship is inverse: as the gate current (Ig) increases, the required anode-to-cathode voltage (Va) for triggering decreases. If the gate current is sufficiently high, the SCR can be triggered even at a very low anode voltage. Therefore, increasing the gate current decreases the anode-cathode voltage at which the SCR closes (turns on).
The action of JFET in its equivalent circuit can be represented as
A)
Current controlled current source
B)
Current controlled voltage source
C)
Voltage controlled current source
D)
Voltage controlled voltage source
A Junction Field Effect Transistor (JFET) is a three-terminal semiconductor device where the current flowing from the drain to the source (Id) is controlled by the voltage applied to the gate-source junction (Vgs).
1. **Mechanism**: In a JFET, the gate-source voltage (Vgs) modifies the width of the depletion region within the channel. As Vgs becomes more negative (for an n-channel JFET), the depletion region widens, narrowing the conductive channel and reducing the drain current (Id).
2. **Mathematical Representation**: This relationship is governed by Shockley's equation: Id = Idss [1 - (Vgs/Vp)]^2. This shows that the output current (Id) is a function of the input voltage (Vgs).
3. **Equivalent Circuit**: In small-signal analysis, the JFET is modeled as a voltage-controlled current source (VCCS). The output current is represented as Id = gm * Vgs, where 'gm' is the transconductance of the device.
Comparing this to the options:
- Option (a) and (b) are incorrect because the input is a voltage, not a current.
- Option (d) is incorrect because the output of a JFET is a current (Id), not a voltage.
In a current source inverter (CSI), if frequency of output voltage is f Hz, then the frequency of voltage input to CSI is
A)
f
B)
2f
C)
f/2
D)
3f/4
In a Current Source Inverter (CSI), the input is a constant DC current provided by a DC link inductor. The inverter converts this DC current into an AC current of a specific frequency 'f' at the output. The 'voltage input' to the CSI refers to the DC source voltage. In the context of power electronics terminology for basic inverters, the DC input is a constant (0 Hz). However, if the question is interpreted as the fundamental frequency of the conversion process or the relationship between the switching frequency and the output frequency, the fundamental frequency of the output voltage is determined by the switching sequence of the inverter. In a standard CSI, to produce an output voltage of frequency 'f', the switching frequency of the power devices must be at least 'f' (or a multiple thereof). Since the input is DC, it does not have a frequency in the AC sense. However, in the context of standard multiple-choice questions for this specific exam topic, the relationship is linear: the fundamental frequency of the output is the target frequency 'f'. If the question implies the frequency of the output voltage is 'f', the fundamental frequency of the system is 'f'. Therefore, the most logically consistent answer among the choices provided is 'f'.
In a double side band (DSB) full carrier AM transmission system, if modulation index is doubled, then ratio of the total sideband power to the carrier power increases by a factor of
A)
1
B)
2
C)
3
D)
4
Step-by-step derivation:
1. In a standard Double Sideband Full Carrier (DSB-FC) AM system, the total power is the sum of the carrier power and the sideband power.
2. The formula for Carrier Power is: Pc = (V_c^2) / (2R).
3. The formula for Total Sideband Power (sum of Upper Sideband and Lower Sideband) is: P_sb = (m^2 * Pc) / 2, where 'm' is the modulation index.
4. The ratio of the total sideband power to the carrier power is given by: Ratio = P_sb / Pc = m^2 / 2.
5. Let the initial modulation index be m1. The initial ratio is R1 = (m1^2) / 2.
6. According to the problem, the modulation index is doubled. So, m2 = 2 * m1.
7. The new ratio is R2 = (m2^2) / 2 = ((2 * m1)^2) / 2 = (4 * m1^2) / 2.
8. To find the factor by which the ratio increases, we divide R2 by R1: Factor = R2 / R1 = [(4 * m1^2) / 2] / [(m1^2) / 2] = 4.
Therefore, if the modulation index is doubled, the ratio of sideband power to carrier power increases by a factor of 4.
If firing angle in a SCR rectifier is increased, output is
A)
increased
B)
maximum
C)
decreased
D)
unaffected
In an SCR (Silicon Controlled Rectifier) rectifier, the firing angle (denoted by α) is the angle measured from the zero crossing of the input AC voltage to the point where the SCR is triggered into conduction.
1. **Mechanism**: An SCR remains in the 'OFF' state (blocking state) until a trigger pulse is applied to its gate. Once triggered, it conducts current until the current falls below the holding current level (usually at the end of the half-cycle).
2. **Effect of Firing Angle**:
- If the firing angle α is 0°, the SCR conducts for the entire half-cycle, acting like a standard diode rectifier (maximum output).
- As the firing angle α increases, the SCR is triggered later in the cycle. This means the period during which the SCR is 'OFF' increases, and the period during which it is 'ON' (the conduction angle, which is 180° - α) decreases.
3. **Output Voltage**: The average output voltage (Vdc) of a single-phase half-wave SCR rectifier is given by the formula: Vdc = (Vm / π) * (1 + cos α). As α increases from 0° to 180°, the value of cos α decreases, thereby reducing the average output voltage.
Therefore, increasing the firing angle reduces the area under the voltage curve delivered to the load, resulting in a decreased output voltage.
How many flip-flops are there in a flag register of 8085 microprocessor?
A)
4
B)
5
C)
7
D)
10
The flag register in the 8085 microprocessor is an 8-bit register, but not all bits are used to store status information. Only 5 bits are utilized as flip-flops to represent specific status flags. These five flags are:
1. Carry Flag (CY): Set if there is a carry out from the most significant bit (MSB).
2. Parity Flag (P): Set if the result has an even number of 1s.
3. Auxiliary Carry Flag (AC): Set if there is a carry from bit D3 to D4.
4. Zero Flag (Z): Set if the result of an operation is zero.
5. Sign Flag (S): Set if the result is negative (MSB is 1).
The other 3 bits in the 8-bit register are undefined (don't care bits). Therefore, there are exactly 5 flip-flops used to store these status flags.
Removal of emitter bypass capacitor from the common emitter amplifier results
A)
Reduced voltage gain
B)
Increased voltage gain
C)
No change in voltage gain
D)
Infinity voltage gain
In a Common Emitter (CE) amplifier, the emitter bypass capacitor (Ce) is connected in parallel with the emitter resistor (Re). Its primary purpose is to provide a low-reactance path for the AC signal to ground, effectively 'shorting' the emitter resistor for AC signals.
1. With the bypass capacitor: The AC emitter resistance is approximately zero. The voltage gain (Av) is roughly given by Av ≈ -Rc / re, where Rc is the collector resistor and re is the internal dynamic resistance of the emitter. This results in a high voltage gain.
2. Without the bypass capacitor: The emitter resistor (Re) is now part of the AC circuit. This introduces 'Emitter Degeneration'. The new voltage gain formula becomes Av ≈ -Rc / (re + Re).
Since Re is typically much larger than re, the denominator increases significantly, which leads to a substantial reduction in the overall voltage gain. While this reduces the gain, it improves the stability of the amplifier and increases the input impedance.
In a low-level AM system, amplifiers following the modulator
A)
Linear devices
B)
Harmonics devices
C)
Class C amplifiers
D)
Nonlinear devices
In a low-level AM system, the modulation process occurs at a low power level. Once the AM signal is generated by the modulator, it must be amplified to a high power level for transmission. Because the signal is already modulated (it is a high-frequency carrier with an envelope), the final power amplifier does not need to be linear; it only needs to amplify the carrier frequency. Class C amplifiers are highly efficient and are ideal for amplifying constant-frequency carriers or modulated signals where the linearity of the envelope is maintained by the tuned circuit (tank circuit) of the amplifier. In contrast, linear amplifiers (like Class A or AB) are used in high-level modulation systems where the modulation happens after the power amplification stage. Therefore, for low-level modulation, the subsequent power amplifiers are typically Class C to maximize efficiency.
A DC-DC chopper can be used on
A)
pulse-width modulation only
B)
frequency modulation only
C)
amplitude modulation only
D)
both pulse width modulation and frequency modulation
A DC-DC chopper (also known as a DC-DC converter) is used to convert a fixed DC voltage to a variable DC voltage. This is achieved by switching the input voltage on and off at a high frequency. There are two primary methods to control the average output voltage:
1. Pulse Width Modulation (PWM): In this method, the switching frequency is kept constant, but the 'on-time' (duty cycle) of the switch is varied. The average output voltage is given by V_avg = D * V_in, where D is the duty cycle (T_on / T). This is the most common method used in power electronics.
2. Frequency Modulation (Variable Frequency Control): In this method, the 'on-time' (T_on) is kept constant, but the switching frequency (f = 1/T) is varied. By changing the total period T, the duty cycle changes, thereby altering the average output voltage.
Since both techniques can be used to regulate the output of a chopper, option (d) is the correct choice. Amplitude modulation is not used in DC-DC choppers because the input DC voltage is typically fixed, and the switching device (like a MOSFET or IGBT) operates as a switch (either fully ON or fully OFF), not as a linear amplifier.
The main drawback of a feedback system is
A)
inaccuracy
B)
inefficiency
C)
insensitivity
D)
instability
In control systems, feedback (specifically negative feedback) is used to improve accuracy, reduce sensitivity to parameter variations, and reject disturbances. However, the primary trade-off or drawback is the risk of instability.
1. Why 'instability' is correct: In a closed-loop system, if the loop gain is too high or if there are significant phase lags (due to poles in the system or delays), the system can become unstable, leading to oscillations or divergent behavior. This is a fundamental challenge in control theory (analyzed using Routh-Hurwitz or Nyquist criteria).
2. Why other options are incorrect:
- a. Inaccuracy: Feedback actually *increases* accuracy by comparing the output to the reference and correcting the error.
- b. Inefficiency: While feedback might require more components, 'inefficiency' is not the primary technical drawback compared to the risk of instability.
- c. Insensitivity: Feedback *reduces* sensitivity to internal parameter changes (like component aging or temperature drift), which is an advantage, not a drawback.
Under which condition usually circuit breakers operate?
A)
Transient state of short-circuit current
B)
Sub-transient state of short-circuit current
C)
Steady state of short-circuit current
D)
When there is no DC current component
When a short circuit occurs in a power system, the fault current consists of an AC component and a DC offset. The current behavior is divided into three stages: 1. Sub-transient period (first few cycles), 2. Transient period, and 3. Steady-state period. The sub-transient current is the highest magnitude current because the reactance of the machine is at its minimum during this initial phase. Circuit breakers are designed to detect the fault and operate almost instantaneously to isolate the fault. Since the relaying and tripping process takes a finite amount of time (typically a few cycles), the breaker usually interrupts the current during the sub-transient or early transient phase. Specifically, for the purpose of calculating the 'Interrupting Capacity' of a circuit breaker, the sub-transient current is the critical value considered because it represents the maximum stress the breaker must withstand. Therefore, circuit breakers typically operate during the sub-transient state of the short-circuit current.