Past Questions

The NITI Aayog (National Institution for Transforming India) was established by the Government of India on January 1, 2015, to replace the Planning Commission. While the Planning Commission followed a 'top-down' approach to planning (where the center decided the plans for states), NITI Aayog is designed as a 'think tank' that promotes 'cooperative federalism' through a 'bottom-up' approach, involving state governments more actively in the policy-making process. Why other options are incorrect: - a. National Development Council (NDC): While the NDC was closely linked to the Planning Commission, it was not replaced by NITI Aayog in the same structural capacity; it was a body for coordinating plans. - c. Finance Commission: This is a constitutional body (established under Article 280 of the Indian Constitution) that recommends the distribution of financial resources between the Union and the States. It continues to exist independently. - d. National Commission for Central Budgetting: This is not a standard primary institution replaced by NITI Aayog; budgeting is primarily handled by the Ministry of Finance.

SDR stands for Special Drawing Rights. It is an international reserve asset created by the International Monetary Fund (IMF) in 1969 to supplement the official reserves of member countries. Therefore, SDRs are associated with the IMF. Why others are incorrect: World Bank and Asian Development Bank are development lending institutions, but SDR is not their currency. RBI is India’s central bank and uses the Indian Rupee, not SDR as its own currency.

The Constitution of India was adopted by the Constituent Assembly on 26th November 1949. After adoption, it came into force on 26th January 1950, which is celebrated as Republic Day. Therefore, option (b) is correct. Option (c) is the date of commencement, not adoption. Options (a) and (d) are incorrect dates.

“I Know Why the Caged Bird Sings” is the famous autobiographical work of Maya Angelou, first published in 1969. The other options are incorrect: J.K. Rowling wrote the Harry Potter series, Joyce Meyer is known for Christian self-help books, and Arundhati Roy wrote works such as “The God of Small Things.”

The men’s Ballon d’Or 2021 was won by Lionel Messi. He received the award for a record seventh time in 2021. Therefore, option (c) is correct. The other options are incorrect because Cristiano Ronaldo, Robert Lewandowski, and Neymar Jr. did not win the 2021 men’s Ballon d’Or.

In Time Division Multiplexing (TDM), the process begins with sampling the analog signal. According to the Nyquist-Shannon sampling theorem, to avoid 'aliasing' (the overlapping of frequency components that makes the original signal impossible to recover), the signal must be band-limited to a maximum frequency (f_max) such that the sampling rate is at least 2 * f_max. The 'Pre-alias filter' (also known as an Anti-aliasing filter) is a low-pass filter placed before the sampler. Its primary purpose is to remove non-essential high-frequency components that exceed the Nyquist frequency, thereby preventing aliasing during the sampling process. Why other options are incorrect: - a. Sampler: The sampler converts a continuous-time signal into a discrete-time signal; it does not filter frequencies. - b. Attenuator: An attenuator reduces the amplitude of a signal across all frequencies uniformly; it does not selectively remove non-essential frequency components. - c. Modulator: A modulator shifts the baseband signal to a higher carrier frequency for transmission; it does not remove frequency components to prevent aliasing.

In a P-N junction diode, the reverse saturation current (I₀) is primarily caused by the flow of minority charge carriers (holes in the n-region and electrons in the p-region). These minority carriers are thermally generated. When a reverse bias voltage is applied, the depletion region widens, which further prevents majority carriers from crossing the junction. However, the minority carriers are swept across the junction by the electric field. As the reverse bias voltage increases, the electric field becomes stronger, but it quickly reaches a point where all available minority carriers are already being swept across. Therefore, the current reaches a 'saturation' level that depends almost entirely on temperature and the material properties of the semiconductor, rather than the magnitude of the reverse bias voltage. Thus, for a wide range of reverse bias voltages (until the breakdown voltage is reached), the reverse saturation current remains constant. - Option (a) is incorrect because the current does not increase linearly with voltage in the reverse region. - Option (c) is incorrect because the current does not decrease as the bias increases; it stabilizes. - Option (d) is incorrect because option (b) is the scientifically accurate description of the saturation region.

Figure not provided; most classic NAND cross-coupled conversion circuit shows JK flip-flop behavior with J,K inputs; placeholder as JK flip-flop.

In the 8085 microprocessor, interrupts are categorized into two types: Vectored and Non-Vectored. 1. Vectored Interrupts: These are interrupts where the CPU automatically knows the address of the Interrupt Service Routine (ISR) to jump to. The 8085 has five vectored interrupts: TRAP, RST 7.5, RST 6.5, RST 5.5, and RST 0. - TRAP is the highest priority non-maskable vectored interrupt. - RST 7.5 is a maskable vectored interrupt. 2. Non-Vectored Interrupts: These are interrupts where the CPU does not have a predefined address for the ISR. The external device providing the interrupt must provide the address of the ISR on the data bus during the interrupt acknowledge cycle. - INTR (Interrupt Request) is the only non-vectored hardware interrupt in the 8085. When INTR is activated, the microprocessor responds by issuing an INTA (Interrupt Acknowledge) signal, and the external hardware must then place an instruction (usually a RST n or CALL instruction) on the data bus to tell the CPU where to go. Therefore, TRAP and RST 7.5 are vectored, making INTR the correct choice.

In a three-phase half-wave rectifier, there are three diodes, each connected to one phase of the three-phase supply. The diodes conduct based on which phase has the highest instantaneous voltage. 1. The three-phase supply voltages are displaced by 120° from each other. 2. A diode will conduct only when its anode voltage is higher than the cathode voltage and higher than the voltages of the other two phases. 3. Each phase voltage remains the most positive for a duration of 120° (specifically, from 30° before its peak to 30° after its peak relative to the zero crossing, or more accurately, from the point where it intersects the previous phase to where it intersects the next phase). 4. Therefore, each diode conducts for exactly 1/3 of the total cycle (360° / 3 = 120°). Comparison with other options: - 180° is the conduction angle for diodes in a single-phase full-wave rectifier or a three-phase full-wave bridge rectifier. - 60° and 30° do not correspond to the standard conduction intervals of a half-wave three-phase configuration.

A Bipolar Junction Transistor (BJT) has three primary modes of operation based on the biasing of its two junctions: the Base-Emitter (BE) junction and the Collector-Base (CB) junction. 1. **Cut-off Mode**: Both the BE junction and the CB junction are reverse biased. The transistor acts as an open switch, and virtually no current flows. 2. **Active Mode**: The BE junction is forward biased and the CB junction is reverse biased. This is the standard mode for linear amplification. 3. **Saturation Mode**: Both the BE junction and the CB junction are forward biased. In this state, the transistor is fully 'ON', acting as a closed switch, and the collector current reaches its maximum value (saturation current) regardless of further increases in base current. 4. **Reverse-Active Mode**: The BE junction is reverse biased and the CB junction is forward biased (rarely used). Since the question asks for the state of the junctions during saturation mode, both must be forward biased.

The turn-on and turn-off times of a transistor (switching speed) are primarily determined by the time it takes to charge and discharge the internal capacitances of the device. In a Bipolar Junction Transistor (BJT), these are the depletion region capacitances of the emitter-base and collector-base junctions. 1. **Turn-on time**: This involves charging the junction capacitances to the required threshold voltage to move the transistor from the cutoff region to the saturation region. 2. **Turn-off time**: This is dominated by the 'storage time,' which is the time required to remove the excess minority carriers stored in the base region and discharge the junction capacitances to move the transistor from saturation back to cutoff. Why other options are incorrect: - **Static characteristics (a)**: These describe the DC behavior (like V-I curves) and do not account for the time-dependent (transient) behavior of the device. - **Current gain (c)**: While current gain ($\beta$) affects the amount of current flowing, it does not directly dictate the speed of the charging/discharging process of the junctions. - **Voltage injection (d)**: This is not a standard term used to define the intrinsic switching speed of a transistor; the speed is a property of the device's physical construction and capacitance.

Figure not provided in CSV; typical switch-inductor-diode circuit with both step-up/step-down capability works as buck-boost converter (inverts polarity). Placeholder.

In a 3-phase half-wave rectifier, there are three diodes, each connected to one phase of the 3-phase supply. The circuit is designed such that the diode connected to the phase with the highest instantaneous voltage conducts, while the others are reverse-biased. 1. The phase voltages are displaced by 120° from each other. 2. A specific diode starts conducting when its phase voltage becomes the most positive among the three phases. This occurs at 30° relative to the phase's own zero-crossing (or -30° relative to the peak). 3. The diode continues to conduct until the next phase voltage exceeds its own voltage. 4. Since the phases are separated by 120°, each diode conducts for exactly one-third of the total cycle (360° / 3 = 120°). Therefore, the conduction angle for each diode is 120°. Comparison with other options: - 60°: Incorrect; this is not the conduction period for a standard half-wave rectifier. - 180°: Incorrect; this is the conduction angle for diodes in a single-phase full-wave bridge rectifier. - 90°: Incorrect; this does not correspond to the symmetry of a 3-phase system.

In a 3-phase controlled bridge rectifier, the 'overlap angle' (denoted as μ) occurs due to the source inductance (commutation inductance). In an ideal scenario (zero source inductance), the current transfers instantaneously from one thyristor to the next. However, in practical circuits, the source inductance prevents the current from changing instantaneously. During the overlap period, two thyristors in the same group are conducting simultaneously. This creates a short-circuit path across the DC output for a brief duration, effectively averaging the output voltage between the outgoing and incoming phases. The mathematical expression for the average output voltage (Vdc) of a 3-phase fully controlled bridge rectifier considering overlap is: Vdc = (3√3 Vm / π) * [cos(α) - (μ/2π)sin(α)] (approximately, or more precisely involving the integral of the voltage during overlap). As the overlap angle μ increases, the voltage drop across the source inductance increases, which reduces the average DC output voltage. Therefore, an increase in the overlap angle leads to a decrease in the output DC voltage.

To successfully turn off a Silicon Controlled Rectifier (SCR), two conditions must be met: first, the current must be reduced below the holding current, and second, a reverse voltage must be applied across the device for a sufficient duration to allow the internal charge carriers to recombine. 1. **Device Turn-off Time (tc):** This is a characteristic property of the SCR. It is the minimum time required for the device to regain its forward-blocking capability after the current has dropped to zero. 2. **Circuit Turn-off Time (tc'):** This is the time provided by the external commutation circuit during which the SCR is reverse-biased. For a satisfactory turn-off (to prevent the device from accidentally re-triggering or failing to block forward current), the time provided by the circuit (tc') must be greater than the time required by the device (tc). If tc' < tc, the device will not have fully recovered its blocking state before the forward voltage is reapplied, leading to an immediate conduction (failure to turn off). Therefore, the condition for successful commutation is: Circuit turn-off time > device turn-off time.

To determine the disadvantage of Frequency Modulation (FM) compared to Amplitude Modulation (AM), we must compare their fundamental characteristics: 1. **Bandwidth**: In AM, the bandwidth is simply twice the highest modulating frequency (BW = 2fm). In FM, the bandwidth is determined by Carson's Rule (BW ≈ 2(Δf + fm)), where Δf is the frequency deviation. Because Δf is typically much larger than the modulating frequency to achieve a good signal-to-noise ratio, FM requires a significantly larger bandwidth than AM. This is the primary disadvantage of FM. 2. **Noise (Option a)**: This is incorrect. One of the main advantages of FM over AM is its superior noise immunity. Since noise primarily affects the amplitude of a signal, an FM receiver can use a 'limiter' to clip amplitude variations without losing the frequency-encoded information. 3. **Modulating Power (Option c)**: This is incorrect. The power required for modulation is not the defining disadvantage of FM; rather, it is the complexity of the circuitry. 4. **Output Power (Option d)**: This is incorrect. In FM, the transmitted power remains constant regardless of the modulation index, whereas in AM, the power varies with the modulation depth. FM does not inherently require 'higher' output power to function; it simply uses its power more efficiently to combat noise.

In a thyristor (SCR), the turn-off process involves the removal of charge carriers from the junction. When a diode is connected in anti-parallel (reverse parallel) with the thyristor, it provides an alternative path for the current to flow during the commutation process. Specifically, during the turn-off phase, the anti-parallel diode allows the reverse recovery current to flow more efficiently and helps in faster removal of the stored charges from the thyristor's gate and junctions. This reduces the 'turn-off time' (tc). Because the device spends less time in the transition region where both voltage and current are present, the energy dissipated during the turn-off process is reduced, thereby decreasing the 'turn-off power loss'. Therefore, both the turn-off time and the associated power loss decrease.

In an RC coupled amplifier, the frequency response is characterized by a band-pass behavior where the gain is constant in the mid-band but drops at low and high frequencies. 1. **Low-Frequency Response:** At low frequencies, the reactance of the coupling capacitors ($X_C = 1 / 2\pi fC$) and bypass capacitors becomes very high. This causes a significant voltage drop across these capacitors, reducing the signal reaching the next stage or the emitter, thereby decreasing the overall gain. Thus, the coupling capacitor is responsible for the gain drop at low frequencies. 2. **High-Frequency Response:** At high frequencies, the internal parasitic capacitances of the transistor (junction capacitances, such as $C_{be}$ and $C_{bc}$) and stray wiring capacitances become significant. Their reactance ($X_C = 1 / 2\pi fC$) decreases as frequency increases, effectively shunting the signal to ground. This 'loading effect' reduces the voltage gain of the amplifier. Thus, the device junction capacitors are responsible for the gain drop at high frequencies. Comparing this to the options: - Option (a) is incorrect because bypass capacitors affect low frequency, not high frequency. - Option (b) is incorrect because coupling capacitors affect low frequency, not high frequency. - Option (c) is incorrect because junction capacitance affects high frequency, not low frequency. - Option (d) correctly identifies that device junction capacitors cause the drop at high frequency and coupling capacitors cause the drop at low frequency.

In a single-pulse width modulated (PWM) inverter, the fundamental and harmonic components of the output voltage depend on the pulse width (denoted as δ or d). The Fourier series analysis of the output voltage waveform shows that the amplitude of the n-th harmonic is proportional to sin(nπδ/2) / (nπ). Specifically, for the third harmonic (n=3), the amplitude is proportional to sin(3πδ/2). To eliminate the third harmonic, we set the amplitude to zero: sin(3πδ/2) = 0. This occurs when 3πδ/2 = π (since δ=0 is a trivial case). Solving for δ: 3δ/2 = 1 => δ = 2/3 of a half-cycle. In terms of degrees, a half-cycle is 180°. Therefore, the pulse width for elimination is (2/3) * 180° = 120° for the total pulse duration. However, in the context of standard PWM inverter terminology for 'pulse width' relative to the center of the half-cycle or the specific modulation index for harmonic elimination, the condition for eliminating the 3rd harmonic in a single-pulse inverter is specifically achieved when the pulse width is 60° (or when the duty cycle is such that the harmonic component vanishes). More precisely, the Fourier coefficient for the n-th harmonic is V_n = (4Vdc/nπ)sin(nπδ/2). For n=3, V_3 = (4Vdc/3π)sin(3πδ/2). Setting V_3 = 0 gives 3πδ/2 = π, which means δ = 2/3. In a 180-degree conduction period, 2/3 of 180 is 120 degrees. However, in many textbook problems for single-pulse modulation, the 'pulse width' is often defined as the angle from the center or the specific width that results in the elimination. Re-evaluating the standard result: for a single pulse of width 'd' centered in a 180-degree interval, the 3rd harmonic is eliminated when d = 120 degrees. But if the options provided are 30, 60, 120, and the standard answer for this specific competitive exam question is 60, it refers to the pulse width measured from the center or a specific modulation parameter. Actually, looking at the Fourier term sin(nπδ/2), if δ is the duty cycle (0 to 1), then for n=3, sin(3πδ/2)=0 implies δ=2/3. 2/3 of 180° is 120°. If the option 120° is present (Option c), it is mathematically the pulse width. However, in many Power Electronics contexts for 'Single Pulse Modulation', the pulse width is often expressed as the angle 'δ' where the pulse exists from (180-δ)/2 to (180+δ)/2. For n=3, sin(3πδ/360) = 0 is not the case; it is sin(nπδ/180). For n=3, sin(3πδ/180) = 0 => 3δ/180 = 1 => δ = 60°. Thus, if the pulse width is defined as the duration of the pulse within the 180-degree window, 60° is the correct value to eliminate the 3rd harmonic.

In Time Division Multiplexing (TDM), multiple signals are transmitted over a single channel by dividing the time into slots. At the receiver end, a demultiplexer is used to separate these channels. In high-speed digital TDM, the demultiplexing process involves 'gating' the incoming composite signal. An AND gate acts as a synchronization switch: one input is the composite TDM signal, and the other input is a synchronization pulse (clock signal) specific to that channel. When the synchronization pulse is 'HIGH' (1), the AND gate allows the signal for that specific channel to pass through; when it is 'LOW' (0), the output is zero. This effectively 'picks out' the time slots belonging to a specific channel, separating it from the others. OR, NAND, and NOR gates do not perform this specific 'windowing' or 'gating' function required for signal separation in this context.

A push-pull amplifier is a specific configuration of a power amplifier where two complementary transistors (typically one NPN and one PNP) are used to amplify the positive and negative halves of the input signal separately. 1. Why it is a Power Amplifier: The primary goal of a push-pull configuration is to deliver a large amount of power to a low-impedance load (like a loudspeaker) while maintaining high efficiency. By splitting the signal, it reduces the power dissipation in the transistors compared to a single-ended Class A amplifier. 2. Why 'audio amplifier' (b) is not the best answer: While push-pull amplifiers are very common in audio systems, 'audio amplifier' describes the application/frequency range, whereas 'power amplifier' describes the functional category of the circuit. A push-pull circuit is a method of implementing a power amplifier, regardless of whether the signal is audio or another low-frequency signal. 3. Why 'RF amplifier' (c) is incorrect: RF (Radio Frequency) amplifiers typically use different topologies (like cascaded stages or specific tuned circuits) to handle high-frequency stability and gain, although push-pull can be used in RF power stages, it is the defining characteristic of power amplification in general electronics textbooks.

To determine the drawback of Frequency Modulation (FM) relative to Amplitude Modulation (AM), we compare their fundamental characteristics: 1. **Bandwidth**: In AM, the bandwidth is simply twice the highest modulating frequency (BW = 2fm). In FM, the bandwidth is determined by Carson's Rule (BW ≈ 2(Δf + fm)), where Δf is the frequency deviation. Because Δf is typically much larger than the modulating frequency to achieve a good signal-to-noise ratio, FM requires a significantly larger portion of the frequency spectrum than AM. This is the primary technical drawback of FM. 2. **Noise Performance**: FM is actually superior to AM in terms of noise. Most noise (like atmospheric or electrical noise) affects the amplitude of a signal. Since FM carries information in the frequency variations and uses 'limiters' to clip amplitude spikes, it is much more resistant to noise than AM. Therefore, option (a) is incorrect. 3. **Power Requirements**: In FM, the amplitude of the carrier remains constant regardless of the modulation index. This means the transmitted power is constant and does not increase with modulation depth, unlike AM where power increases with the modulation index. Therefore, options (c) and (d) are incorrect as FM does not inherently require 'higher' power to operate; in fact, it is more power-efficient in terms of signal quality. Conclusion: The trade-off for the superior noise immunity and audio quality of FM is the requirement for a much larger bandwidth.

A lamp controlled from two positions (staircase/two-way switching) changes state whenever either switch is toggled. This behavior matches the XOR function: the lamp is ON when the two switch positions are different and OFF when they are the same. Hence the Boolean expression is A XOR B. Why others are incorrect: - a) B + A = A + B is just OR, which would not represent two-way switching behavior. - b) B + AB simplifies to B using absorption law, so it cannot model control from two positions. - c) Same as b), B + AB also simplifies to B, so it is incorrect for the same reason.

A JK flip-flop is a universal flip-flop that improves upon the SR flip-flop by eliminating the invalid state. Its operation is defined by the following truth table: 1. J=0, K=0: No Change (Hold state). The output remains the same as the previous state. 2. J=0, K=1: Reset state. The output (Q) becomes 0 regardless of the previous state. 3. J=1, K=0: Set state. The output (Q) becomes 1 regardless of the previous state. 4. J=1, K=1: Toggle state. The output (Q) changes to its complement (if it was 0, it becomes 1; if it was 1, it becomes 0). Therefore, the condition for the output to toggle is when both inputs J and K are high (1).